aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/MachineCodeEmitter.cpp
diff options
context:
space:
mode:
authorMisha Brukman <brukman+llvm@gmail.com>2003-05-28 17:49:29 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2003-05-28 17:49:29 +0000
commit8996f44f7abf1a2a0f1bb74d9e109327eda8d177 (patch)
treefadd352e3a26345fafa9131b3ce499c79118d737 /lib/CodeGen/MachineCodeEmitter.cpp
parente57a529fcaf85cd4cbb9963d18b83b4618081181 (diff)
Fixed ordering of elements in instructions: although the binary instructions
list (rd, rs1, imm), in that order (bit-wise), the actual assembly syntax is instr rd, imm, rs1, and that is how they are constructed in the instruction selector. This fixes the discrepancy. Also fixed some comments along the same lines and fixed page numbers referring to where instructions are described in the Sparc manual. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6384 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineCodeEmitter.cpp')
0 files changed, 0 insertions, 0 deletions