diff options
author | Eli Friedman <eli.friedman@gmail.com> | 2011-05-04 22:10:36 +0000 |
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committer | Eli Friedman <eli.friedman@gmail.com> | 2011-05-04 22:10:36 +0000 |
commit | baf717a08a0bc8cb0a7931ea3ce51d063a8fe6f0 (patch) | |
tree | a783b0a34d6af1c5765489ade3449320ebbec85f /lib/CodeGen/MachineCSE.cpp | |
parent | b90584ae78a7acc4ac92e3ad52121a10c520b980 (diff) |
Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases.
Original message:
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130877 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineCSE.cpp')
-rw-r--r-- | lib/CodeGen/MachineCSE.cpp | 76 |
1 files changed, 49 insertions, 27 deletions
diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp index f97ccf6579..5d79e96097 100644 --- a/lib/CodeGen/MachineCSE.cpp +++ b/lib/CodeGen/MachineCSE.cpp @@ -33,6 +33,8 @@ STATISTIC(NumCoalesces, "Number of copies coalesced"); STATISTIC(NumCSEs, "Number of common subexpression eliminated"); STATISTIC(NumPhysCSEs, "Number of physreg referencing common subexpr eliminated"); +STATISTIC(NumCrossBlockPhysCSEs, + "Number of physreg common subexprs cross-block eliminated"); STATISTIC(NumCommutes, "Number of copies coalesced after commuting"); namespace { @@ -82,7 +84,8 @@ namespace { MachineBasicBlock::const_iterator E) const ; bool hasLivePhysRegDefUses(const MachineInstr *MI, const MachineBasicBlock *MBB, - SmallSet<unsigned,8> &PhysRefs) const; + SmallSet<unsigned,8> &PhysRefs, + SmallVector<unsigned,8> &PhysDefs) const; bool PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI, SmallSet<unsigned,8> &PhysRefs) const; bool isCSECandidate(MachineInstr *MI); @@ -189,7 +192,8 @@ MachineCSE::isPhysDefTriviallyDead(unsigned Reg, /// instruction does not uses a physical register. bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI, const MachineBasicBlock *MBB, - SmallSet<unsigned,8> &PhysRefs) const { + SmallSet<unsigned,8> &PhysRefs, + SmallVector<unsigned,8> &PhysDefs) const{ MachineBasicBlock::const_iterator I = MI; I = llvm::next(I); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); @@ -206,6 +210,7 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI, if (MO.isDef() && (MO.isDead() || isPhysDefTriviallyDead(Reg, I, MBB->end()))) continue; + PhysDefs.push_back(Reg); PhysRefs.insert(Reg); for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) PhysRefs.insert(*Alias); @@ -216,35 +221,43 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI, bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI, SmallSet<unsigned,8> &PhysRefs) const { - // For now conservatively returns false if the common subexpression is - // not in the same basic block as the given instruction. - MachineBasicBlock *MBB = MI->getParent(); - if (CSMI->getParent() != MBB) - return false; - MachineBasicBlock::const_iterator I = CSMI; I = llvm::next(I); - MachineBasicBlock::const_iterator E = MI; + // Look backward from MI to find CSMI. unsigned LookAheadLeft = LookAheadLimit; + MachineBasicBlock *CurBB = MI->getParent(); + MachineBasicBlock::const_reverse_iterator I(MI); + MachineBasicBlock::const_reverse_iterator E(CurBB->rend()); while (LookAheadLeft) { - // Skip over dbg_value's. - while (I != E && I->isDebugValue()) - ++I; + while (LookAheadLeft && I != E) { + // Skip over dbg_value's. + while (I != E && I->isDebugValue()) + ++I; - if (I == E) - return true; + if (I == E) break; - for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { - const MachineOperand &MO = I->getOperand(i); - if (!MO.isReg() || !MO.isDef()) - continue; - unsigned MOReg = MO.getReg(); - if (TargetRegisterInfo::isVirtualRegister(MOReg)) - continue; - if (PhysRefs.count(MOReg)) - return false; - } + if (&*I == CSMI) + return true; - --LookAheadLeft; - ++I; + for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { + const MachineOperand &MO = I->getOperand(i); + if (!MO.isReg() || !MO.isDef()) + continue; + unsigned MOReg = MO.getReg(); + if (TargetRegisterInfo::isVirtualRegister(MOReg)) + continue; + if (PhysRefs.count(MOReg)) + return false; + } + + --LookAheadLeft; + ++I; + } + // Go back another BB; for now, only go back at most one BB. + MachineBasicBlock *CSBB = CSMI->getParent(); + if (!CSBB->isSuccessor(CurBB) || CurBB->pred_size() != 1) + return false; + CurBB = CSBB; + I = CSBB->rbegin(); + E = CSBB->rend(); } return false; @@ -395,7 +408,8 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) { // used, then it's not safe to replace it with a common subexpression. // It's also not safe if the instruction uses physical registers. SmallSet<unsigned,8> PhysRefs; - if (FoundCSE && hasLivePhysRegDefUses(MI, MBB, PhysRefs)) { + SmallVector<unsigned,8> DirectPhysRefs; + if (FoundCSE && hasLivePhysRegDefUses(MI, MBB, PhysRefs, DirectPhysRefs)) { FoundCSE = false; // ... Unless the CS is local and it also defines the physical register @@ -448,6 +462,14 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) { MRI->clearKillFlags(CSEPairs[i].second); } MI->eraseFromParent(); + if (!DirectPhysRefs.empty() && CSMI->getParent() != MBB) { + assert(CSMI->getParent()->isSuccessor(MBB)); + ++NumCrossBlockPhysCSEs; + SmallVector<unsigned,8>::iterator PI = DirectPhysRefs.begin(), + PE = DirectPhysRefs.end(); + for (; PI != PE; ++PI) + MBB->addLiveIn(*PI); + } ++NumCSEs; if (!PhysRefs.empty()) ++NumPhysCSEs; |