diff options
author | Evan Cheng <evan.cheng@apple.com> | 2007-11-15 08:13:29 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-11-15 08:13:29 +0000 |
commit | 5d446265c740c17ed12e693423f0363296670d60 (patch) | |
tree | 559ddb784fba18a4cb81d5bf5cf59735fcdb22ca /lib/CodeGen/LiveIntervalAnalysis.cpp | |
parent | 65e2da3b4d6925bf30693595a524a3a43acc1f17 (diff) |
Fix a thinko in post-allocation coalescer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44166 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp')
-rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 833868a458..55094e3e5d 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -168,15 +168,22 @@ bool LiveIntervals::conflictsWithPhysRegDef(const LiveInterval &li, if (index == end) break; MachineInstr *MI = getInstructionFromIndex(index); + unsigned SrcReg, DstReg; + if (tii_->isMoveInstr(*MI, SrcReg, DstReg)) + if (SrcReg == li.reg || DstReg == li.reg) + continue; for (unsigned i = 0; i != MI->getNumOperands(); ++i) { MachineOperand& mop = MI->getOperand(i); - if (!mop.isRegister() || !mop.isDef()) + if (!mop.isRegister()) continue; unsigned PhysReg = mop.getReg(); - if (PhysReg == 0) + if (PhysReg == 0 || PhysReg == li.reg) continue; - if (MRegisterInfo::isVirtualRegister(PhysReg)) + if (MRegisterInfo::isVirtualRegister(PhysReg)) { + if (!vrm.hasPhys(PhysReg)) + continue; PhysReg = vrm.getPhys(PhysReg); + } if (PhysReg && mri_->regsOverlap(PhysReg, reg)) return true; } |