diff options
author | Evan Cheng <evan.cheng@apple.com> | 2009-01-29 02:20:59 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-01-29 02:20:59 +0000 |
commit | 5a3c6a87b0173b9d367f7b55e7c99e5110ede057 (patch) | |
tree | 5124ba9c48331e7b38d11d10d9a7892b2874fa66 /lib/CodeGen/LiveIntervalAnalysis.cpp | |
parent | e5af2d3a224d4b38760a26d237cde040cb6e14eb (diff) |
Exit with nice warnings when register allocator run out of registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63267 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp')
-rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 8cd82a694b..8e8e8ff6d0 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -2228,7 +2228,19 @@ void LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li, unsigned Index = getInstructionIndex(MI); if (pli.liveAt(Index)) { vrm.addEmergencySpill(SpillReg, MI); - pli.removeRange(getLoadIndex(Index), getStoreIndex(Index)+1); + unsigned StartIdx = getLoadIndex(Index); + unsigned EndIdx = getStoreIndex(Index)+1; + if (pli.isInOneLiveRange(StartIdx, EndIdx)) + pli.removeRange(StartIdx, EndIdx); + else { + cerr << "Ran out of registers during register allocation!\n"; + if (MI->getOpcode() == TargetInstrInfo::INLINEASM) { + cerr << "Please check your inline asm statement for invalid " + << "constraints:\n"; + MI->print(cerr.stream(), tm_); + } + exit(1); + } for (const unsigned* AS = tri_->getSubRegisters(SpillReg); *AS; ++AS) { if (!hasInterval(*AS)) continue; |