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authorEvan Cheng <evan.cheng@apple.com>2009-03-23 18:24:37 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-03-23 18:24:37 +0000
commit2824a655509577127d221eecd1425de196f80320 (patch)
tree65b1dc19f1722b6be489356403125eaec786f350 /lib/CodeGen/LiveIntervalAnalysis.cpp
parent8cccf0ef0ced7f4d75ca574b596036a9b6cd4315 (diff)
Fix PR3391 and PR3864. Reg allocator infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67544 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp')
-rw-r--r--lib/CodeGen/LiveIntervalAnalysis.cpp12
1 files changed, 8 insertions, 4 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index b5c21952fa..cd6f81c6eb 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -2214,8 +2214,9 @@ unsigned LiveIntervals::getNumConflictsWithPhysReg(const LiveInterval &li,
}
/// spillPhysRegAroundRegDefsUses - Spill the specified physical register
-/// around all defs and uses of the specified interval.
-void LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
+/// around all defs and uses of the specified interval. Return true if it
+/// was able to cut its interval.
+bool LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
unsigned PhysReg, VirtRegMap &vrm) {
unsigned SpillReg = getRepresentativeReg(PhysReg);
@@ -2226,6 +2227,7 @@ void LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
assert(*AS == SpillReg || !allocatableRegs_[*AS] ||
tri_->isSuperRegister(*AS, SpillReg));
+ bool Cut = false;
LiveInterval &pli = getInterval(SpillReg);
SmallPtrSet<MachineInstr*, 8> SeenMIs;
for (MachineRegisterInfo::reg_iterator I = mri_->reg_begin(li.reg),
@@ -2240,9 +2242,10 @@ void LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
vrm.addEmergencySpill(SpillReg, MI);
unsigned StartIdx = getLoadIndex(Index);
unsigned EndIdx = getStoreIndex(Index)+1;
- if (pli.isInOneLiveRange(StartIdx, EndIdx))
+ if (pli.isInOneLiveRange(StartIdx, EndIdx)) {
pli.removeRange(StartIdx, EndIdx);
- else {
+ Cut = true;
+ } else {
cerr << "Ran out of registers during register allocation!\n";
if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {
cerr << "Please check your inline asm statement for invalid "
@@ -2260,6 +2263,7 @@ void LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
}
}
}
+ return Cut;
}
LiveRange LiveIntervals::addLiveRangeToEndOfBlock(unsigned reg,