diff options
| author | Dan Gohman <gohman@apple.com> | 2008-09-13 17:58:21 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-09-13 17:58:21 +0000 |
| commit | 014278e6a11fa0767853b831e5bf51b95bf541c5 (patch) | |
| tree | cf93cc36bc9bf6bb3b78a416592b7a93c84efb22 /lib/CodeGen/LiveIntervalAnalysis.cpp | |
| parent | b8ca4ff6439c1543a0c6729cbcd6c70c3be7dc3c (diff) | |
Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56189 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp')
| -rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 4e4be8f645..41804db13d 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -858,7 +858,7 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li, unsigned ImpUse = 0; for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI->getOperand(i); - if (MO.isReg()) { + if (MO.isRegister()) { unsigned Reg = MO.getReg(); if (Reg == 0) continue; @@ -1592,7 +1592,7 @@ LiveIntervals::handleSpilledImpDefs(const LiveInterval &li, VirtRegMap &vrm, NewLIs.push_back(&getOrCreateInterval(NewVReg)); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.getReg() == li.reg) + if (MO.isRegister() && MO.getReg() == li.reg) MO.setReg(NewVReg); } } @@ -1636,7 +1636,7 @@ addIntervalsForSpillsFast(const LiveInterval &li, for (unsigned i = 0; i != MI->getNumOperands(); ++i) { MachineOperand& mop = MI->getOperand(i); - if (!mop.isReg() || mop.getReg() != li.reg) continue; + if (!mop.isRegister() || mop.getReg() != li.reg) continue; HasUse |= MI->getOperand(i).isUse(); HasDef |= MI->getOperand(i).isDef(); |