Move post-RA scheduling before branch folding for now, because branch

folding's tail merging doesn't currently preserve liveness information
which post-RA scheduling requires.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61183 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 7 insertions, 7 deletions

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index e6873923bc..c9ff15d494 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -225,13 +225,6 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
 
-  // Branch folding must be run after regalloc and prolog/epilog insertion.
-  if (!Fast)
-    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
-
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(cerr));
-
   // Second pass scheduler.
   if (!Fast && !DisablePostRAScheduler) {
     PM.add(createPostRAScheduler());
@@ -240,6 +233,13 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
       PM.add(createMachineFunctionPrinterPass(cerr));
   }
 
+  // Branch folding must be run after regalloc and prolog/epilog insertion.
+  if (!Fast)
+    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
+
+  if (PrintMachineCode)
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   PM.add(createGCMachineCodeAnalysisPass());
 
   if (PrintMachineCode)