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authorMisha Brukman <brukman+llvm@gmail.com>2003-06-04 04:54:06 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2003-06-04 04:54:06 +0000
commitd15cd2752fc2dba5155f7f5588e80449919dd424 (patch)
tree9108baf7c9a6d5f054ba4da7817aadd224d37182 /lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
parentd22807a43efae80c007ddcff318f6be584de2482 (diff)
I have finally seen the light. The code to change the opcode must live higher in
the loop, and in both cases. In the first case, it is a VReg that is a constant so it may be actually converted to a constant. In the second case, it is already a constant, but then if it doesn't change its type (e.g. to become a register and have the value loaded from memory if it is too large to live in its instruction field), we must change the opcode BEFORE the 'continue', otherwise we miss the opportunity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6602 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp')
-rw-r--r--lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp17
1 files changed, 13 insertions, 4 deletions
diff --git a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
index f654e90100..86a7e7042c 100644
--- a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
+++ b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
@@ -186,6 +186,12 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
immedValue);
if (opType == MachineOperand::MO_VirtualRegister)
constantThatMustBeLoaded = true;
+ else {
+ // The optype has changed from being a register to an immediate
+ // This means we need to change the opcode, e.g. ADDr -> ADDi
+ unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
+ minstr->setOpcode(newOpcode);
+ }
}
}
else
@@ -203,6 +209,13 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
opCode, target, (immedPos == (int)op),
machineRegNum, immedValue);
+ if (opType == MachineOperand::MO_SignExtendedImmed) {
+ // The optype is an immediate value
+ // This means we need to change the opcode, e.g. ADDr -> ADDi
+ unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
+ minstr->setOpcode(newOpcode);
+ }
+
if (opType == mop.getType())
continue; // no change: this is the most common case
@@ -220,10 +233,6 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
else if (opType == MachineOperand::MO_SignExtendedImmed ||
opType == MachineOperand::MO_UnextendedImmed) {
minstr->SetMachineOperandConst(op, opType, immedValue);
- // The optype has changed from being a register to an immediate
- // This means we need to change the opcode, e.g. ADDr -> ADDi
- unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
- minstr->setOpcode(newOpcode);
} else if (constantThatMustBeLoaded ||
(opValue && isa<GlobalValue>(opValue)))
{ // opValue is a constant that must be explicitly loaded into a reg