diff options
author | Chris Lattner <sabre@nondot.org> | 2002-02-03 07:29:45 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2002-02-03 07:29:45 +0000 |
commit | 0861b0c3e6a5f66650b0027800ca8e64c6324d16 (patch) | |
tree | 24eacff3357ec6cee950532765f6745b1090fff6 /lib/CodeGen/InstrSched/SchedGraph.cpp | |
parent | 3462cae44fb12e22474e935e77d010f4461a6697 (diff) |
* Straighten out #includes
* Switch from MachineCodeForVMInstr to MachineCodeForInstruction model
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1644 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/InstrSched/SchedGraph.cpp')
-rw-r--r-- | lib/CodeGen/InstrSched/SchedGraph.cpp | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/lib/CodeGen/InstrSched/SchedGraph.cpp b/lib/CodeGen/InstrSched/SchedGraph.cpp index 7c83e1a58c..890a911c48 100644 --- a/lib/CodeGen/InstrSched/SchedGraph.cpp +++ b/lib/CodeGen/InstrSched/SchedGraph.cpp @@ -13,21 +13,18 @@ //**************************************************************************/ #include "SchedGraph.h" -#include "llvm/InstrTypes.h" -#include "llvm/Instruction.h" -#include "llvm/BasicBlock.h" -#include "llvm/Method.h" -#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/InstrSelection.h" +#include "llvm/CodeGen/MachineInstr.h" +#include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/Target/MachineInstrInfo.h" #include "llvm/Target/MachineRegInfo.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/BasicBlock.h" +#include "llvm/Method.h" #include "llvm/iOther.h" #include "Support/StringExtras.h" #include "Support/STLExtras.h" -#include <algorithm> -#include <vector> #include <iostream> -#include <ext/hash_map> using std::vector; using std::pair; @@ -353,12 +350,12 @@ SchedGraph::addCDEdges(const TerminatorInst* term, const TargetMachine& target) { const MachineInstrInfo& mii = target.getInstrInfo(); - MachineCodeForVMInstr& termMvec = term->getMachineInstrVec(); + MachineCodeForInstruction &termMvec = MachineCodeForInstruction::get(term); // Find the first branch instr in the sequence of machine instrs for term // unsigned first = 0; - while (! mii.isBranch(termMvec[first]->getOpCode())) + while (!mii.isBranch(termMvec[first]->getOpCode())) ++first; assert(first < termMvec.size() && "No branch instructions for BR? Ok, but weird! Delete assertion."); |