diff options
| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2002-07-08 22:59:23 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2002-07-08 22:59:23 +0000 |
| commit | 0baf1c0911017be6626cf4fe4cc78d345fdc9a27 (patch) | |
| tree | 9d67304cb681519a305dc581beea8a60fcd4fc7d /lib/CodeGen/InstrSched/InstrScheduling.cpp | |
| parent | 9afa88c3a73187b9454085651807896002e020ca (diff) | |
A single MachineInstr operand may now be both a def and a use,
so additional dep. edges have to be added.
This was needed to correctly handle conditional move instructions!
MachineCodeForBasicBlock is now an annotation on BasicBlock.
Renamed "earliestForNode" to "earliestReadyTimeForNode".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2826 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/InstrSched/InstrScheduling.cpp')
| -rw-r--r-- | lib/CodeGen/InstrSched/InstrScheduling.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index 46c1c15998..6ea37247d0 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -8,6 +8,7 @@ #include "SchedPriorities.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineCodeForInstruction.h" +#include "llvm/CodeGen/MachineCodeForBasicBlock.h" #include "llvm/CodeGen/MachineCodeForMethod.h" #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better #include "llvm/Target/TargetMachine.h" @@ -631,7 +632,7 @@ AssignInstructionsToSlots(class SchedulingManager& S, unsigned maxIssue) static void RecordSchedule(const BasicBlock* bb, const SchedulingManager& S) { - MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec(); + MachineCodeForBasicBlock& mvec = MachineCodeForBasicBlock::get(bb); const MachineInstrInfo& mii = S.schedInfo.getInstrInfo(); #ifndef NDEBUG @@ -1220,7 +1221,7 @@ ReplaceNopsWithUsefulInstr(SchedulingManager& S, // fill delay slots, otherwise, just discard them. // unsigned int firstDelaySlotIdx = node->getOrigIndexInBB() + 1; - MachineCodeForBasicBlock& bbMvec = node->getBB()->getMachineInstrVec(); + MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(node->getBB()); assert(bbMvec[firstDelaySlotIdx - 1] == brInstr && "Incorrect instr. index in basic block for brInstr"); @@ -1313,7 +1314,7 @@ ChooseInstructionsForDelaySlots(SchedulingManager& S, // Simply passing in an empty delayNodeVec will have this effect. // delayNodeVec.clear(); - const MachineCodeForBasicBlock& bbMvec = bb->getMachineInstrVec(); + const MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(bb); for (unsigned i=0; i < bbMvec.size(); i++) if (bbMvec[i] != brInstr && mii.getNumDelaySlots(bbMvec[i]->getOpCode()) > 0) |