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| author | Bill Wendling <isanbard@gmail.com> | 2010-11-08 00:39:58 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-11-08 00:39:58 +0000 |
| commit | 5991487c10faa5f1c0cc815381d745150582a309 (patch) | |
| tree | 064f00b9585dd15aee5ef4ae63e5baa5353abc43 /lib/Analysis/AliasAnalysisCounter.cpp | |
| parent | b32e7844e9f79d2bd4ff34a1d19aba347f999abc (diff) | |
Make RegList an ASM operand so that TableGen will generate code for it. This is
an initial implementation and may change once reglists are fully fleshed out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118390 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Analysis/AliasAnalysisCounter.cpp')
0 files changed, 0 insertions, 0 deletions