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authorJay Foad <jay.foad@gmail.com>2011-04-06 07:55:30 +0000
committerJay Foad <jay.foad@gmail.com>2011-04-06 07:55:30 +0000
commitcb88ec34f0ed7b969e20b8e6e67fee9b29f65dfa (patch)
tree0aa10d25637017e3b58d13b49965ea82c00f544a /docs
parent4841121580df86b327013d1fab2a9339be487bce (diff)
Trivial typo fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128996 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
-rw-r--r--docs/CodeGenerator.html2
-rw-r--r--docs/ReleaseNotes.html4
2 files changed, 3 insertions, 3 deletions
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index 02869f63a4..4a656a243c 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -2532,7 +2532,7 @@ OperandTy: VirtReg, | VirtReg, UnsImm, VirtReg, SignExtImm PhysReg
<div class="doc_text">
-<p>x86 has an feature which provides
+<p>x86 has a feature which provides
the ability to perform loads and stores to different address spaces
via the x86 segment registers. A segment override prefix byte on an
instruction causes the instruction's memory access to go to the specified
diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html
index 22f0db3472..f06bc6f8a2 100644
--- a/docs/ReleaseNotes.html
+++ b/docs/ReleaseNotes.html
@@ -633,7 +633,7 @@ it run faster:</p>
</li>
<li>X86 support for FS/GS relative loads and stores using <a
- href="CodeGenerator.html#x86_memory">address space 256/257</a> work reliably
+ href="CodeGenerator.html#x86_memory">address space 256/257</a> works reliably
now.</li>
<li>LLVM 2.9 generates much better code in several cases by using adc/sbb to
@@ -644,7 +644,7 @@ it run faster:</p>
shorten the height of instruction schedules without inducing register spills.
</li>
-<li>The MC assembler support for 3dNow! and 3DNowA instructions.</li>
+<li>The MC assembler supports 3dNow! and 3DNowA instructions.</li>
<li>Several bugs have been fixed for Windows x64 code generator.</li>
</ul>