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authorJustin Holewinski <justin.holewinski@gmail.com>2012-03-24 01:23:20 +0000
committerJustin Holewinski <justin.holewinski@gmail.com>2012-03-24 01:23:20 +0000
commit41085086b2a604b9a7db2fd6d88867d6c7774353 (patch)
tree5a0cfad37167da16eda24958416dd0ff7cbecb63 /docs/CommandGuide/html/manpage.css
parentc5480c634c9de552f9f65c899bd55cc8f1f89e68 (diff)
PTX: Fix predicate logic bug
Code such as: %vreg100 = setcc %vreg10, -1, SETNE brcond %vreg10, %tgt was being incorrectly morphed into %vreg100 = and %vreg10, 1 brcond %vreg10, %tgt where the 'and' instruction could be eliminated since such logic is on 1-bit types in the PTX back-end, leaving us with just: brcond %vreg10, %tgt which essentially gives us inverted branch conditions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153364 91177308-0d34-0410-b5e6-96231b3b80d8
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