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| author | Chris Lattner <sabre@nondot.org> | 2005-09-30 17:46:55 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-09-30 17:46:55 +0000 |
| commit | 88a06d2e3ef598a902abc7c0cfb0bd65ab3a7252 (patch) | |
| tree | 8002fae2a1f656a656b1f8a2f23defebc10288c4 /docs/CodeGenerator.html | |
| parent | 22842105dec6ab35dc37a4901b2d791150da446b (diff) | |
Update the discussion of TargetRegisterDesc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23563 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs/CodeGenerator.html')
| -rw-r--r-- | docs/CodeGenerator.html | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html index fcbff1c44b..a62dbedcdb 100644 --- a/docs/CodeGenerator.html +++ b/docs/CodeGenerator.html @@ -358,9 +358,9 @@ description) are unique small numbers, and virtual registers are generally large.</p> <p>Each register in the processor description has an associated -<tt>MRegisterDesc</tt> entry, which provides a textual name for the register -(used for assembly output and debugging dumps), a set of aliases (used to -indicate that one register overlaps with another), and some flag bits. +<tt>TargetRegisterDesc</tt> entry, which provides a textual name for the register +(used for assembly output and debugging dumps) and a set of aliases (used to +indicate that one register overlaps with another). </p> <p>In addition to the per-register description, the <tt>MRegisterInfo</tt> class |