diff options
| author | Chris Lattner <sabre@nondot.org> | 2009-10-11 18:21:32 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2009-10-11 18:21:32 +0000 |
| commit | f9f3cb18457d493b55bda504c9ab2a6dff239795 (patch) | |
| tree | 7a6654f97784e481ccb506b8588b07ad608c8507 | |
| parent | 3baca51cca19c78c4b6e74d813402661126bcec7 (diff) | |
some notes from Anton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83777 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | docs/ReleaseNotes-2.6.html | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/docs/ReleaseNotes-2.6.html b/docs/ReleaseNotes-2.6.html index f97310d3fe..0638baeb5e 100644 --- a/docs/ReleaseNotes-2.6.html +++ b/docs/ReleaseNotes-2.6.html @@ -682,6 +682,9 @@ it run faster:</p> <li>The vector forms of the <a href="LangRef.html#i_icmp">icmp</a> and <a href="LangRef.html#i_fcmp">fcmp</a> instructions now select to efficient SSE operations.</li> +<li>Support for the win64 calling conventions have improved. The primary + missing feature is support for varargs function definitions. It seems to + work well for many win64 JIT purposes.</li> <li>The X86 backend has preliminary support for <a href="CodeGenerator.html#x86_memory">mapping address spaces to segment register references</a>. This allows you to write GS or FS relative memory @@ -748,7 +751,8 @@ supports both the Thumb2 and Advanced SIMD (Neon) instruction sets.</li> <p>These features are still somewhat experimental and subject to change. The Neon intrinsics, in particular, may change in future -releases of LLVM.</p> +releases of LLVM. ARMv7 support has progressed a lot on top of tree since 2.6 +branched.</p> </ul> |