diff options
| author | Johnny Chen <johnny.chen@apple.com> | 2011-04-12 18:48:00 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2011-04-12 18:48:00 +0000 |
| commit | f9ce2cba42f76ad82bbb17436902f66a9e5f6367 (patch) | |
| tree | b929bc698aabda678f2b14fb2157b6051cb1704c | |
| parent | e1b43c3b4000ee7201fcac8d1c8e75bb9fb547e3 (diff) | |
The Thumb2 Ld, St, and Preload instructions with the i12 forms should have its Inst{23}
be specified as '1' (add = TRUE).
Also add a utility function for Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129377 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 3 | ||||
| -rw-r--r-- | lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h | 2 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/thumb-tests.txt | 14 |
3 files changed, 18 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 6794e75796..ac963cb59a 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -845,6 +845,7 @@ multiclass T2I_ld<bit signed, bits<2> opcod, string opc, let Inst{15-12} = Rt; bits<17> addr; + let addr{12} = 1; // add = TRUE let Inst{19-16} = addr{16-13}; // Rn let Inst{23} = addr{12}; // U let Inst{11-0} = addr{11-0}; // imm @@ -925,6 +926,7 @@ multiclass T2I_st<bits<2> opcod, string opc, let Inst{15-12} = Rt; bits<17> addr; + let addr{12} = 1; // add = TRUE let Inst{19-16} = addr{16-13}; // Rn let Inst{23} = addr{12}; // U let Inst{11-0} = addr{11-0}; // imm @@ -1522,6 +1524,7 @@ multiclass T2Ipl<bits<1> write, bits<1> instr, string opc> { let Inst{15-12} = 0b1111; bits<17> addr; + let addr{12} = 1; // add = TRUE let Inst{19-16} = addr{16-13}; // Rn let Inst{23} = addr{12}; // U let Inst{11-0} = addr{11-0}; // imm12 diff --git a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h index b1a389abfd..2eeb8755bf 100644 --- a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h +++ b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h @@ -108,6 +108,8 @@ static inline bool IsGPR(unsigned RegClass) { // Utilities for 32-bit Thumb instructions. +static inline bool BadReg(uint32_t n) { return n == 13 || n == 15; } + // Extract imm4: Inst{19-16}. static inline unsigned getImm4(uint32_t insn) { return slice(insn, 19, 16); diff --git a/test/MC/Disassembler/ARM/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt index 4342615604..609cd6bade 100644 --- a/test/MC/Disassembler/ARM/thumb-tests.txt +++ b/test/MC/Disassembler/ARM/thumb-tests.txt @@ -171,7 +171,16 @@ 0x5d 0xf8 0x34 0x40 # CHECK: ldr.w r5, [r6, #30] -0x56 0xf8 0x1e 0x56 +0xd6 0xf8 0x1e 0x50 + +# CHECK: ldrh.w r5, [r6, #30] +0xb6 0xf8 0x1e 0x50 + +# CHECK: ldrt r5, [r6, #30] +0x56 0xf8 0x1e 0x5e + +# CHECK: ldr r5, [r6, #-30] +0x56 0xf8 0x1e 0x5c # CHECK: sel r7, r3, r5 0xa3 0xfa 0x85 0xf7 @@ -197,6 +206,9 @@ # CHECK: pld [pc, #-16] 0x1f 0xf8 0x10 0xf0 +# CHECK: pld [r5, #30] +0x95 0xf8 0x1e 0xf0 + # CHECK: stc2 p12, cr15, [r9], {137} 0x89 0xfc 0x89 0xfc |