diff options
| author | Benjamin Kramer <benny.kra@googlemail.com> | 2012-10-13 12:50:19 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2012-10-13 12:50:19 +0000 |
| commit | f8b65aaf39d84e5576c0579c19ba9998ebb634d2 (patch) | |
| tree | 5503bbf09468db58e9d7d132b7bee40b2c3936ed | |
| parent | 07525a6be6bce604f3b528c91973ac4e66742266 (diff) | |
X86: Fix accidentally swapped operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165871 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/select.ll | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index b7a9f6f317..9ec03bf8f7 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -9158,7 +9158,7 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const { // Blacklist CopyFromReg to avoid partial register stalls. T1.getOpcode() != ISD::CopyFromReg && T2.getOpcode()!=ISD::CopyFromReg){ SDVTList VTs = DAG.getVTList(T1.getValueType(), MVT::Glue); - SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, VTs, T1, T2, CC, Cond); + SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, VTs, T2, T1, CC, Cond); return DAG.getNode(ISD::TRUNCATE, DL, Op.getValueType(), Cmov); } } diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll index f4c8d9e767..3bec3acdbf 100644 --- a/test/CodeGen/X86/select.ll +++ b/test/CodeGen/X86/select.ll @@ -350,10 +350,10 @@ define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind { %sel = select i1 %cmp, i8 %a, i8 %b ret i8 %sel ; CHECK: test18: -; CHECK: cmpl $15 -; CHECK: cmovll +; CHECK: cmpl $15, %edi +; CHECK: cmovgel %edx ; ATOM: test18: -; ATOM: cmpl $15 -; ATOM: cmovll +; ATOM: cmpl $15, %edi +; ATOM: cmovgel %edx } |