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authorEvan Cheng <evan.cheng@apple.com>2007-05-08 21:06:08 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-05-08 21:06:08 +0000
commitf88b3a5698dc419f5f2c48e39e4058577599fa00 (patch)
tree9e1617c7fb61ba6895e7db54e1523f012eadad66
parent59039632e120de996f36db707e4718b469c7228b (diff)
PredicateOperand can be used as a normal operand for isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36947 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/PowerPC/PPCInstrInfo.td2
-rw-r--r--lib/Target/Target.td2
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index e43b33921b..bbddad2d0a 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -272,7 +272,7 @@ def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits.
// PowerPC Predicate operand. 20 = (0<<5)|20 = always, CR0 is a dummy reg
// that doesn't matter.
-def pred : PredicateOperand<(ops imm, CRRC), (ops (i32 20), CR0)> {
+def pred : PredicateOperand<OtherVT, (ops imm, CRRC), (ops (i32 20), CR0)> {
let PrintMethod = "printPredicateOperand";
}
diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index f98c414d34..d7723a546f 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -254,7 +254,7 @@ def i64imm : Operand<i64>;
/// instruction. OpTypes specifies the MIOperandInfo for the operand, and
/// AlwaysVal specifies the value of this predicate when set to "always
/// execute".
-class PredicateOperand<dag OpTypes, dag AlwaysVal> : Operand<OtherVT> {
+class PredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal> : Operand<ty> {
let MIOperandInfo = OpTypes;
dag ExecuteAlways = AlwaysVal;
}