aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAkira Hatanaka <ahatanaka@mips.com>2012-05-11 23:00:40 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-05-11 23:00:40 +0000
commitf5b1e2802f6525a760dab59bb267f6ede15b87e0 (patch)
tree4582e6cd0ae0ee42151f1d877d3ba0571edc9e29
parent015d2ad9ecd2ac22bec44a4f191b3d59b787d56f (diff)
Use regular expression to match register names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156656 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--test/CodeGen/Mips/inlineasm_constraint.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/Mips/inlineasm_constraint.ll b/test/CodeGen/Mips/inlineasm_constraint.ll
index 97a56780bb..5adec3bb29 100644
--- a/test/CodeGen/Mips/inlineasm_constraint.ll
+++ b/test/CodeGen/Mips/inlineasm_constraint.ll
@@ -5,7 +5,7 @@ entry:
; First I with short
; CHECK: #APP
-; CHECK: addi $3,$2,4096
+; CHECK: addi ${{[0-9]+}},${{[0-9]+}},4096
; CHECK: #NO_APP
tail call i16 asm sideeffect "addi $0,$1,$2", "=r,r,I"(i16 7, i16 4096) nounwind