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authorAkira Hatanaka <ahatanak@gmail.com>2011-09-26 21:55:17 +0000
committerAkira Hatanaka <ahatanak@gmail.com>2011-09-26 21:55:17 +0000
commitf40de9d287cb57dd0449c46f91fa10c8784427da (patch)
treef04e8d9da542fed35f6238d0334c65cb2518cbd0
parent8b4198da9d5884f9e33c54a9537b9a8eed4deff7 (diff)
Set register class of a register according to value of HasMips64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 6ad7724240..4578d224b6 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2268,7 +2268,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
else if (RegVT == MVT::f32)
RC = Mips::FGR32RegisterClass;
else if (RegVT == MVT::f64)
- RC = Mips::AFGR64RegisterClass;
+ RC = HasMips64 ? Mips::FGR64RegisterClass : Mips::AFGR64RegisterClass;
else
llvm_unreachable("RegVT not supported by FormalArguments Lowering");