diff options
| author | Jim Grosbach <grosbach@apple.com> | 2010-10-27 19:55:59 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-27 19:55:59 +0000 |
| commit | f31430f6ecea74681a53d1e4cb64b0f93635fc58 (patch) | |
| tree | 39ab5af90758d17b147b1a368fe70231c05aba23 | |
| parent | 07ee63283cc2b9a4d6c98ecd30d1b721fe3cb29a (diff) | |
ARM JIT fix for LDRi12 and company.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117478 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 21 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 1 |
2 files changed, 18 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 0ff0d5142a..affec70d26 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -175,7 +175,21 @@ namespace { unsigned getBitfieldInvertedMaskOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } unsigned getAddrModeImm12OpValue(const MachineInstr &MI, unsigned Op) - const { return 0; } + const { + // {17-13} = reg + // {12} = (U)nsigned (add == '1', sub == '0') + // {11-0} = imm12 + const MachineOperand &MO = MI.getOperand(Op); + const MachineOperand &MO1 = MI.getOperand(Op + 1); + unsigned Reg = getARMRegisterNumbering(MO.getReg()); + int32_t Imm12 = MO1.getImm(); + uint32_t Binary; + Binary = Imm12 & 0xfff; + if (Imm12 >= 0) + Binary |= (1 << 12); + Binary |= (Reg << 13); + return Binary; + } /// getMovi32Value - Return binary encoding of operand for movw/movt. If the /// machine operand requires relocation, record the relocation and return @@ -946,9 +960,8 @@ void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI, // Part of binary is determined by TableGn. unsigned Binary = getBinaryCodeForInstr(MI); - // If this is an LDRi12, LDRrs, or LDRcp, nothing more needs be done. - if (MI.getOpcode() == ARM::LDRi12 || MI.getOpcode() == ARM::LDRrs - || MI.getOpcode() == ARM::LDRcp) { + // If this is an LDRi12 or LDRcp, nothing more needs be done. + if (MI.getOpcode() == ARM::LDRi12 || MI.getOpcode() == ARM::LDRcp) { emitWordLE(Binary); return; } diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 1e061c2ea6..ac7c165d4c 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -397,6 +397,7 @@ def addrmode_imm12 : Operand<i32>, def ldst_so_reg : Operand<i32>, ComplexPattern<i32, 3, "SelectLdStSOReg", []> { // FIXME: Simplify the printer + // FIXME: Add EncoderMethod for this addressing mode let PrintMethod = "printAddrMode2Operand"; let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm); } |