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authorDevang Patel <dpatel@apple.com>2012-01-23 22:35:25 +0000
committerDevang Patel <dpatel@apple.com>2012-01-23 22:35:25 +0000
commitf2d213745e07e884c1616f2f3d0b78f9e918e5db (patch)
treebb8e3d680935efc5c086ea31d2a82e5809e91375
parentc1bddefc56cd1db30326d6464f50db3dae6061eb (diff)
Intel syntax: Robustify parsing of memory operand's displacement experssion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148737 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/AsmParser/X86AsmParser.cpp9
-rw-r--r--test/MC/X86/intel-syntax.s6
2 files changed, 11 insertions, 4 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 29e26eddc8..d0d3328720 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -655,8 +655,13 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
Disp = isPlus ? ValExpr : MCConstantExpr::Create(0-Val, getContext());
} else
return ErrorOperand(PlusLoc, "unexpected token after +");
- } else if (getLexer().is(AsmToken::Identifier))
- ParseRegister(IndexReg, Start, End);
+ } else if (getLexer().is(AsmToken::Identifier)) {
+ // This could be an index registor or a displacement expression.
+ End = Parser.getTok().getLoc();
+ if (!IndexReg)
+ ParseRegister(IndexReg, Start, End);
+ else if (getParser().ParseExpression(Disp, End)) return 0;
+ }
}
if (getLexer().isNot(AsmToken::RBrac))
diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s
index a069070857..2c69280711 100644
--- a/test/MC/X86/intel-syntax.s
+++ b/test/MC/X86/intel-syntax.s
@@ -56,7 +56,9 @@ _main:
// CHECK: fld %st(0)
fld ST(0)
// CHECK: movl %fs:(%rdi), %eax
-mov EAX, DWORD PTR FS:[RDI]
+ mov EAX, DWORD PTR FS:[RDI]
// CHECK: leal (,%rdi,4), %r8d
-lea R8D, DWORD PTR [4*RDI]
+ lea R8D, DWORD PTR [4*RDI]
+// CHECK: movl _fnan(,%ecx,4), %ecx
+ mov ECX, DWORD PTR [4*ECX + _fnan]
ret