diff options
| author | Chris Lattner <sabre@nondot.org> | 2008-12-25 01:32:49 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-12-25 01:32:49 +0000 |
| commit | f1e9fd5676401163f9441189f935f8a48e6d37eb (patch) | |
| tree | aff3061cb848cdad94747c3f1663fea2bb0494b6 | |
| parent | d1e3229e4b0ec88cc81d585b03334deb3505fe89 (diff) | |
Fix some JIT encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61425 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86Instr64bit.td | 8 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 12 |
2 files changed, 10 insertions, 10 deletions
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td index 065fd8dd2f..aa0e97411a 100644 --- a/lib/Target/X86/X86Instr64bit.td +++ b/lib/Target/X86/X86Instr64bit.td @@ -921,14 +921,14 @@ def CMP64mi32 : RIi32<0x81, MRM7m, (outs), // TODO: BT with immediate operands. // TODO: BTC, BTR, and BTS let Defs = [EFLAGS] in { -def BT64rr : RI<0xA3, MRMSrcReg, (outs), (ins GR64:$src1, GR64:$src2), +def BT64rr : RI<0xA3, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2), "bt{q}\t{$src2, $src1|$src1, $src2}", [(X86bt GR64:$src1, GR64:$src2), - (implicit EFLAGS)]>; -def BT64mr : RI<0xA3, MRMSrcMem, (outs), (ins i64mem:$src1, GR64:$src2), + (implicit EFLAGS)]>, TB; +def BT64mr : RI<0xA3, MRMDestMem, (outs), (ins i64mem:$src1, GR64:$src2), "bt{q}\t{$src2, $src1|$src1, $src2}", [(X86bt (loadi64 addr:$src1), GR64:$src2), - (implicit EFLAGS)]>; + (implicit EFLAGS)]>, TB; } // Defs = [EFLAGS] // Conditional moves diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 4d22c3cfc2..be36cba5e4 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -2658,19 +2658,19 @@ let Defs = [EFLAGS] in { def BT16rr : I<0xA3, MRMSrcReg, (outs), (ins GR16:$src1, GR16:$src2), "bt{w}\t{$src2, $src1|$src1, $src2}", [(X86bt GR16:$src1, GR16:$src2), - (implicit EFLAGS)]>, OpSize; + (implicit EFLAGS)]>, OpSize, TB; def BT32rr : I<0xA3, MRMSrcReg, (outs), (ins GR32:$src1, GR32:$src2), "bt{l}\t{$src2, $src1|$src1, $src2}", [(X86bt GR32:$src1, GR32:$src2), - (implicit EFLAGS)]>; -def BT16mr : I<0xA3, MRMSrcMem, (outs), (ins i16mem:$src1, GR16:$src2), + (implicit EFLAGS)]>, TB; +def BT16mr : I<0xA3, MRMDestMem, (outs), (ins i16mem:$src1, GR16:$src2), "bt{w}\t{$src2, $src1|$src1, $src2}", [(X86bt (loadi16 addr:$src1), GR16:$src2), - (implicit EFLAGS)]>, OpSize; -def BT32mr : I<0xA3, MRMSrcMem, (outs), (ins i32mem:$src1, GR32:$src2), + (implicit EFLAGS)]>, OpSize, TB; +def BT32mr : I<0xA3, MRMDestMem, (outs), (ins i32mem:$src1, GR32:$src2), "bt{l}\t{$src2, $src1|$src1, $src2}", [(X86bt (loadi32 addr:$src1), GR32:$src2), - (implicit EFLAGS)]>; + (implicit EFLAGS)]>, TB; } // Defs = [EFLAGS] // Sign/Zero extenders |