diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-04-11 20:08:52 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-04-11 20:08:52 +0000 |
| commit | ee27f57a6a4dd7fa9259b3604f563907da1f65ef (patch) | |
| tree | 2da04563c8d4ed39862eddb6b19b61a9f8986013 | |
| parent | 30e82431b35866ba148fc32c95accb424238bbe3 (diff) | |
Fix expansion of shifts by exactly NVT bits on arch's (like X86) that have
masking shifts.
This fixes the miscompilation of this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
into this:
test1:
movl 4(%esp), %edx
movl %edx, %eax
orl 8(%esp), %eax
ret
allowing us to generate this instead:
test1:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21230 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index e1d9836f81..e421317172 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1500,6 +1500,9 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt, } else if (Cst > NVTBits) { Lo = DAG.getConstant(0, NVT); Hi = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Cst-NVTBits,ShTy)); + } else if (Cst == NVTBits) { + Lo = DAG.getConstant(0, NVT); + Hi = InL; } else { Lo = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Cst, ShTy)); Hi = DAG.getNode(ISD::OR, NVT, @@ -1514,6 +1517,9 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt, } else if (Cst > NVTBits) { Lo = DAG.getNode(ISD::SRL, NVT, InH, DAG.getConstant(Cst-NVTBits,ShTy)); Hi = DAG.getConstant(0, NVT); + } else if (Cst == NVTBits) { + Lo = InH; + Hi = DAG.getConstant(0, NVT); } else { Lo = DAG.getNode(ISD::OR, NVT, DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(Cst, ShTy)), @@ -1530,6 +1536,10 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt, DAG.getConstant(Cst-NVTBits, ShTy)); Hi = DAG.getNode(ISD::SRA, NVT, InH, DAG.getConstant(NVTBits-1, ShTy)); + } else if (Cst == NVTBits) { + Lo = InH; + Hi = DAG.getNode(ISD::SRA, NVT, InH, + DAG.getConstant(NVTBits-1, ShTy)); } else { Lo = DAG.getNode(ISD::OR, NVT, DAG.getNode(ISD::SRL, NVT, InL, DAG.getConstant(Cst, ShTy)), |