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| author | NAKAMURA Takumi <geek4civic@gmail.com> | 2013-01-12 15:37:00 +0000 |
|---|---|---|
| committer | NAKAMURA Takumi <geek4civic@gmail.com> | 2013-01-12 15:37:00 +0000 |
| commit | edaf85606d7ac8368dd7fa0e9fd4042e523a6e3a (patch) | |
| tree | 5c345205842086e23401ee9b4f87777f3ae21780 | |
| parent | 0813589f72de5f15a28f36e2235cb933b7b8ebc0 (diff) | |
MipsDisassembler.cpp: Prune DecodeHWRegs64RegisterClass() to suppress a warning. [-Wunused-function]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172319 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index 9560f3fc52..1efeffd328 100644 --- a/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -128,11 +128,6 @@ static DecodeStatus DecodeAFGR64RegisterClass(MCInst &Inst, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeHWRegs64RegisterClass(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder); - static DecodeStatus DecodeACRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, @@ -459,17 +454,6 @@ static DecodeStatus DecodeAFGR64RegisterClass(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeHWRegs64RegisterClass(MCInst &Inst, - unsigned RegNo, - uint64_t Address, - const void *Decoder) { - //Currently only hardware register 29 is supported - if (RegNo != 29) - return MCDisassembler::Fail; - Inst.addOperand(MCOperand::CreateReg(Mips::HWR29_64)); - return MCDisassembler::Success; -} - static DecodeStatus DecodeACRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, |