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| author | Jim Grosbach <grosbach@apple.com> | 2011-08-23 19:49:10 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-08-23 19:49:10 +0000 |
| commit | ec8b866434d530dee5b885e9db8da86db053c9ff (patch) | |
| tree | 177139302ebaadf5bec5cf06d274234f73425260 | |
| parent | 414b02357a7a733e3258da1b7c0f2c12b32f193e (diff) | |
Thumb parsing and encoding for SVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138360 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 2 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb-instructions.s | 10 | ||||
| -rw-r--r-- | test/MC/ARM/thumb-diagnostics.s | 10 |
3 files changed, 21 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index c54aae0c04..419da02172 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -534,7 +534,7 @@ let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in { } -// A8.6.218 Supervisor Call (Software Interrupt) -- for disassembly only +// A8.6.218 Supervisor Call (Software Interrupt) // A8.6.16 B: Encoding T1 // If Inst{11-8} == 0b1111 then SEE SVC let isCall = 1, Uses = [SP] in diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s index e72a36321f..5766847cca 100644 --- a/test/MC/ARM/basic-thumb-instructions.s +++ b/test/MC/ARM/basic-thumb-instructions.s @@ -533,3 +533,13 @@ _func: subs r1, r2, r3 @ CHECK: subs r1, r2, r3 @ encoding: [0xd1,0x1a] + + +@------------------------------------------------------------------------------ +@ SVC +@------------------------------------------------------------------------------ + svc #0 + svc #255 + +@ CHECK: svc #0 @ encoding: [0x00,0xdf] +@ CHECK: svc #255 @ encoding: [0xff,0xdf] diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s index 9a4ddf1d9c..650e8cecf3 100644 --- a/test/MC/ARM/thumb-diagnostics.s +++ b/test/MC/ARM/thumb-diagnostics.s @@ -108,3 +108,13 @@ error: invalid operand for instruction @ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled @ CHECK-ERRORS: str r3, [r7, #128] @ CHECK-ERRORS: ^ + +@ Out of range immediate for SVC instruction. + svc #-1 + svc #256 +@ CHECK-ERRORS: error: invalid operand for instruction +@ CHECK-ERRORS: svc #-1 +@ CHECK-ERRORS: ^ +@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled +@ CHECK-ERRORS: svc #256 +@ CHECK-ERRORS: ^ |