diff options
author | Bill Wendling <isanbard@gmail.com> | 2008-11-21 00:11:16 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2008-11-21 00:11:16 +0000 |
commit | ea7b527aa56ad0fe547d3d99b21e845a49a031cb (patch) | |
tree | 60b26110e9c87c686c18306afea3de6c3f5fead4 | |
parent | 47d1a214a7013d12140a0c4972d7ba761150dfd4 (diff) |
Add UADDO and SADDO nodes. These will be used for determining an overflow
condition in an addition operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59760 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 9 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 |
2 files changed, 10 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 7567ecc095..ef155d8b7f 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -249,7 +249,14 @@ namespace ISD { // to them to be chained together for add and sub of arbitrarily large // values. ADDE, SUBE, - + + // Overflow-aware nodes for arithmetic operations. These nodes take two + // operands: the normal lhs and rhs to the add. They produce two results: + // the normal result of the add, and a flag indicating whether an overflow + // occured. These nodes are generated from the llvm.[su]add.with.overflow + // intrinsics. They are lowered by target-dependent code. + SADDO, UADDO, + // Simple binary floating point operators. FADD, FSUB, FMUL, FDIV, FREM, diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 61a04bfdb7..d22a65d2ff 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -5151,6 +5151,8 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { case ISD::CARRY_FALSE: return "carry_false"; case ISD::ADDC: return "addc"; case ISD::ADDE: return "adde"; + case ISD::SADDO: return "saddo"; + case ISD::UADDO: return "uaddo"; case ISD::SUBC: return "subc"; case ISD::SUBE: return "sube"; case ISD::SHL_PARTS: return "shl_parts"; |