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authorChris Lattner <sabre@nondot.org>2005-12-07 17:59:14 +0000
committerChris Lattner <sabre@nondot.org>2005-12-07 17:59:14 +0000
commite80242a948c77651c7da128a1cebd346523bbcef (patch)
treec935a743331dc1ca2f25b7e29fae3c730f4bf3d2
parentb14ab8a10d7955501ec80b247b2510bbd2511b12 (diff)
X86 doesn't support sextinreg for 8-bit things either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index b42faa0a09..7f3aa499bc 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -88,6 +88,7 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
setOperationAction(ISD::BRTWOWAY_CC , MVT::Other, Expand);
setOperationAction(ISD::MEMMOVE , MVT::Other, Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Expand);
+ setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand);
setOperationAction(ISD::SEXTLOAD , MVT::i1 , Expand);