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| author | Evan Cheng <evan.cheng@apple.com> | 2006-03-20 08:14:16 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-03-20 08:14:16 +0000 |
| commit | e63d746ef6e75d5461c9e29bcaf04b2755455c7f (patch) | |
| tree | bd065ed4619f7c17d6c6c34523571399a255396a | |
| parent | f26ba697258755b0b7b9642822f3c4c18a5004aa (diff) | |
Use tblgen'd VECTOR_SHUFFLE selection code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26900 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 16 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 5 |
2 files changed, 2 insertions, 19 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 39f5446926..7ddf8c0104 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -927,22 +927,6 @@ void PPCDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) { switch (N->getOpcode()) { default: break; - case ISD::VECTOR_SHUFFLE: - // FIXME: This should be autogenerated from the .td file, it is here for now - // due to bugs in tblgen. - if (Op.getOperand(1).getOpcode() == ISD::UNDEF && - (Op.getValueType() == MVT::v4f32 || Op.getValueType() == MVT::v4i32) && - PPC::isSplatShuffleMask(Op.getOperand(2).Val)) { - SDOperand N0; - Select(N0, N->getOperand(0)); - - Result = CodeGenMap[Op] = - SDOperand(CurDAG->getTargetNode(PPC::VSPLTW, MVT::v4f32, - getI32Imm(PPC::getVSPLTImmediate(Op.getOperand(2).Val)), - N0), 0); - return; - } - assert(0 && "ILLEGAL VECTOR_SHUFFLE!"); case ISD::SETCC: Result = SelectSETCC(Op); return; diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 66e89dc09d..4817ec1fff 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -1034,9 +1034,8 @@ def VSPLTH : VXForm_1<588, (ops VRRC:$vD, u5imm:$UIMM, VRRC:$vB), def VSPLTW : VXForm_1<652, (ops VRRC:$vD, u5imm:$UIMM, VRRC:$vB), "vspltw $vD, $vB, $UIMM", VecPerm, - [/* - (set VRRC:$vD, (vector_shuffle (v4f32 VRRC:$vB), (undef), - VSPLT_shuffle_mask:$UIMM))*/]>; + [(set VRRC:$vD, (vector_shuffle (v4f32 VRRC:$vB), (undef), + VSPLT_shuffle_mask:$UIMM))]>; // FIXME: ALSO ADD SUPPORT FOR v4i32! // VX-Form Pseudo Instructions |