diff options
author | Evan Cheng <evan.cheng@apple.com> | 2007-05-18 01:19:57 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-05-18 01:19:57 +0000 |
commit | e5e7ce458a2062dd9a8b495f4d73d359e0e269de (patch) | |
tree | 453f1dca4c5dfc2075918276084edd404cb53994 | |
parent | b4b0ce7c298c72ab03711ff8ab277317b839081a (diff) |
Silence some compilation warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37197 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index a598fb2c8f..92da57a013 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1369,7 +1369,7 @@ SDOperand ARMTargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) { unsigned SrcOff = 0, DstOff = 0; MVT::ValueType VT = MVT::i32; unsigned VTSize = 4; - const int MAX_LOADS_IN_LDM = 6; + const unsigned MAX_LOADS_IN_LDM = 6; SDOperand LoadChains[MAX_LOADS_IN_LDM]; SDOperand Loads[MAX_LOADS_IN_LDM]; @@ -1377,7 +1377,7 @@ SDOperand ARMTargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) { // number of stores. The loads and stores will get combined into // ldm/stm later on. while(EmittedNumMemOps < NumMemOps) { - unsigned int i; + unsigned i; for (i=0; i<MAX_LOADS_IN_LDM && EmittedNumMemOps+i < NumMemOps; i++) { Loads[i] = DAG.getLoad(VT, Chain, DAG.getNode(ISD::ADD, VT, Src, |