diff options
author | Evan Cheng <evan.cheng@apple.com> | 2009-11-21 06:20:26 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2009-11-21 06:20:26 +0000 |
commit | e54cb16308ad40d0f0b257de47efaa0ee5a47004 (patch) | |
tree | 3e3b83a8c49d3ff9c9bbc27b3576213a2fc6bcf3 | |
parent | 2c4ceb177be718a7a3697ea63aa254719fc3528f (diff) |
Allow target to disable if-converting predicable instructions. e.g. NEON instructions under ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89541 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 7 | ||||
-rw-r--r-- | lib/CodeGen/IfConversion.cpp | 2 |
2 files changed, 8 insertions, 1 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 43fd54e183..72ebe3cafa 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -514,6 +514,13 @@ public: return false; } + /// isPredicable - Return true if the specified instruction can be predicated. + /// By default, this returns true for every instruction with a + /// PredicateOperand. + virtual bool isPredicable(MachineInstr *MI) const { + return MI->getDesc().isPredicable(); + } + /// isSafeToMoveRegClassDefs - Return true if it's safe to move a machine /// instruction that defines the specified register class. virtual bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const { diff --git a/lib/CodeGen/IfConversion.cpp b/lib/CodeGen/IfConversion.cpp index 45f08b168a..c23d7070a3 100644 --- a/lib/CodeGen/IfConversion.cpp +++ b/lib/CodeGen/IfConversion.cpp @@ -608,7 +608,7 @@ void IfConverter::ScanInstructions(BBInfo &BBI) { if (TII->DefinesPredicate(I, PredDefs)) BBI.ClobbersPred = true; - if (!TID.isPredicable()) { + if (!TII->isPredicable(I)) { BBI.IsUnpredicable = true; return; } |