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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-01-20 19:18:32 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2011-01-20 19:18:32 +0000
commite47f3751d7770916f250a00a84316d412e959c00 (patch)
treeffb8fd44b8bf3b67fe2a09fd241e7bafee2ffdb3
parent55931ab992d8f7fd23d1e8fa994cd8b03b98569f (diff)
Fix the encoding and parsing of clrex instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123936 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrThumb2.td11
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp3
-rw-r--r--test/MC/ARM/arm_instructions.s2
-rw-r--r--test/MC/ARM/thumb2.s2
4 files changed, 13 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index 777389181a..de30bbb699 100644
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -2912,13 +2912,16 @@ def t2STREXD : T2I_strex<0b11, (outs rGPR:$Rd),
}
// Clear-Exclusive is for disassembly only.
-def t2CLREX : T2I<(outs), (ins), NoItinerary, "clrex", "",
- [/* For disassembly only; pattern left blank */]>,
- Requires<[IsARM, HasV7]> {
- let Inst{31-20} = 0xf3b;
+def t2CLREX : T2XI<(outs), (ins), NoItinerary, "clrex",
+ [/* For disassembly only; pattern left blank */]>,
+ Requires<[IsThumb2, HasV7]> {
+ let Inst{31-16} = 0xf3bf;
let Inst{15-14} = 0b10;
+ let Inst{13} = 0;
let Inst{12} = 0;
+ let Inst{11-8} = 0b1111;
let Inst{7-4} = 0b0010;
+ let Inst{3-0} = 0b1111;
}
//===----------------------------------------------------------------------===//
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index ee6ef2b819..b388dced01 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -1194,7 +1194,8 @@ GetMnemonicAcceptInfo(StringRef Mnemonic, bool &CanAcceptCarrySet,
Mnemonic == "cps" || Mnemonic == "mcr2" || Mnemonic == "it" ||
Mnemonic == "mcrr2" || Mnemonic == "cbz" || Mnemonic == "cdp2" ||
Mnemonic == "trap" || Mnemonic == "mrc2" || Mnemonic == "mrrc2" ||
- Mnemonic == "dsb" || Mnemonic == "movs" || Mnemonic == "isb") {
+ Mnemonic == "dsb" || Mnemonic == "movs" || Mnemonic == "isb" ||
+ Mnemonic == "clrex") {
CanAcceptPredicationCode = false;
} else {
CanAcceptPredicationCode = true;
diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s
index 9c2a4d5abc..a26db1b4eb 100644
--- a/test/MC/ARM/arm_instructions.s
+++ b/test/MC/ARM/arm_instructions.s
@@ -159,3 +159,5 @@
@ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe]
cdp2 p7, #1, c1, c1, c1, #4
+@ CHECK: clrex @ encoding: [0x1f,0xf0,0x7f,0xf5]
+ clrex
diff --git a/test/MC/ARM/thumb2.s b/test/MC/ARM/thumb2.s
index 46bd37fbab..146d674c3e 100644
--- a/test/MC/ARM/thumb2.s
+++ b/test/MC/ARM/thumb2.s
@@ -197,3 +197,5 @@
@ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xfe,0x81,0x17]
cdp2 p7, #1, c1, c1, c1, #4
+@ CHECK: clrex @ encoding: [0xbf,0xf3,0x2f,0x8f]
+ clrex