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authorChris Lattner <sabre@nondot.org>2007-02-28 07:09:55 +0000
committerChris Lattner <sabre@nondot.org>2007-02-28 07:09:55 +0000
commite32bbf61c0897ee00518392d0ab74c7fcd8ca01a (patch)
tree6687b98eede6da140d083265bde10ecd70a38165
parent66baf26fe0c229142d483030e1633f656822c5ee (diff)
use high-level functions in CCState
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34739 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp21
1 files changed, 6 insertions, 15 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 87625a1968..548f34aaa9 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -438,15 +438,8 @@ SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) {
SmallVector<CCValAssign, 16> RVLocs;
unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv();
CCState CCInfo(CC, getTargetMachine(), RVLocs);
+ CCInfo.AnalyzeReturn(Op.Val, RetCC_X86);
- // Determine which register each value should be copied into.
- for (unsigned i = 0; i != Op.getNumOperands() / 2; ++i) {
- MVT::ValueType VT = Op.getOperand(i*2+1).getValueType();
- if (RetCC_X86(i, VT, VT, CCValAssign::Full,
- cast<ConstantSDNode>(Op.getOperand(i*2+2))->getValue(),
- CCInfo))
- assert(0 && "Unhandled result type!");
- }
// If this is the first return lowered for this function, add the regs to the
// liveout set for the function.
@@ -521,16 +514,14 @@ SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) {
SDNode *X86TargetLowering::
LowerCallResult(SDOperand Chain, SDOperand InFlag, SDNode *TheCall,
unsigned CallingConv, SelectionDAG &DAG) {
- SmallVector<SDOperand, 8> ResultVals;
-
+
+ // Assign locations to each value returned by this call.
SmallVector<CCValAssign, 16> RVLocs;
CCState CCInfo(CallingConv, getTargetMachine(), RVLocs);
+ CCInfo.AnalyzeCallResult(TheCall, RetCC_X86);
+
- for (unsigned i = 0, e = TheCall->getNumValues() - 1; i != e; ++i) {
- MVT::ValueType VT = TheCall->getValueType(i);
- if (RetCC_X86(i, VT, VT, CCValAssign::Full, 0, CCInfo))
- assert(0 && "Unhandled result type!");
- }
+ SmallVector<SDOperand, 8> ResultVals;
// Copy all of the result registers out of their specified physreg.
if (RVLocs.size() != 1 || RVLocs[0].getLocReg() != X86::ST0) {