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authorJim Grosbach <grosbach@apple.com>2010-11-13 01:28:30 +0000
committerJim Grosbach <grosbach@apple.com>2010-11-13 01:28:30 +0000
commitdf7e0f8d5de7feb82923f627062c774e31e74e48 (patch)
tree72527cf96233d84c6c245daa3ed0bfde4b2c13a6
parent0f6e33b0c83eb6db0a059dd9d16798d919725b94 (diff)
Swap multiclass operand order for consistency with other patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118965 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 379ed91286..a0c7c9c5fc 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1546,7 +1546,7 @@ def LDRD : AI3ldd<(outs GPR:$dst1, GPR:$dst2), (ins addrmode3:$addr), LdMiscFrm,
[]>, Requires<[IsARM, HasV5TE]>;
// Indexed loads
-multiclass AI2_ldridx<bit isByte, InstrItinClass itin, string opc> {
+multiclass AI2_ldridx<bit isByte, string opc, InstrItinClass itin> {
def _PRE : AI2ldstidx<1, isByte, 1, (outs GPR:$Rt, GPR:$Rn_wb),
(ins addrmode2:$addr), IndexModePre, LdFrm, itin,
opc, "\t$Rt, $addr!", "$addr.base = $Rn_wb", []> {
@@ -1558,8 +1558,8 @@ multiclass AI2_ldridx<bit isByte, InstrItinClass itin, string opc> {
opc, "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []>;
}
-defm LDR : AI2_ldridx<0, IIC_iLoad_ru, "ldr">;
-defm LDRB : AI2_ldridx<1, IIC_iLoad_bh_ru, "ldrb">;
+defm LDR : AI2_ldridx<0, "ldr", IIC_iLoad_ru>;
+defm LDRB : AI2_ldridx<1, "ldrb", IIC_iLoad_bh_ru>;
def LDRH_PRE : AI3ldhpr<(outs GPR:$Rt, GPR:$Rn_wb),
(ins addrmode3:$addr), LdMiscFrm, IIC_iLoad_bh_ru,