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authorScott Michel <scottm@aero.org>2008-12-09 06:12:03 +0000
committerScott Michel <scottm@aero.org>2008-12-09 06:12:03 +0000
commitdb1b5bf5eb4b70ce67b5ae5a0fb77ce9ad922ed1 (patch)
treea925defedfe1d09a30a3361223ff46c30ca0bc69
parente9f1015d1f184a51aaadfd03be0846bd5e7d08a2 (diff)
CellSPU:
- Fix call.ll and call_indirect.ll expected results, now that it's using a different pre-register allocation scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60741 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--test/CodeGen/CellSPU/call.ll2
-rw-r--r--test/CodeGen/CellSPU/call_indirect.ll2
2 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/CellSPU/call.ll b/test/CodeGen/CellSPU/call.ll
index de6ed6b640..a305a23540 100644
--- a/test/CodeGen/CellSPU/call.ll
+++ b/test/CodeGen/CellSPU/call.ll
@@ -1,7 +1,7 @@
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
; RUN: grep brsl %t1.s | count 1
; RUN: grep brasl %t1.s | count 1
-; RUN: grep stqd %t1.s | count 81
+; RUN: grep stqd %t1.s | count 80
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu"
diff --git a/test/CodeGen/CellSPU/call_indirect.ll b/test/CodeGen/CellSPU/call_indirect.ll
index e1924e83eb..4b0a957feb 100644
--- a/test/CodeGen/CellSPU/call_indirect.ll
+++ b/test/CodeGen/CellSPU/call_indirect.ll
@@ -10,7 +10,7 @@
; RUN: grep ilhu %t2.s | count 2
; RUN: grep iohl %t2.s | count 2
; RUN: grep rotqby %t2.s | count 6
-; RUN: grep lqd %t2.s | count 18
+; RUN: grep lqd %t2.s | count 13
; RUN: grep ilhu %t2.s | count 2
; RUN: grep ai %t2.s | count 9
; RUN: grep dispatch_tab %t2.s | count 6