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authorNadav Rotem <nadav.rotem@intel.com>2012-07-16 10:52:25 +0000
committerNadav Rotem <nadav.rotem@intel.com>2012-07-16 10:52:25 +0000
commitd93ea88cdef5cd7e5b540f1fe913c798a8d27b24 (patch)
tree05e50baf8794149e53a2cbd61a63ced3bb694141
parent349f14c72cbcd3c50091d20a874967aca5f2f746 (diff)
Fix a bug in the 3-address conversion of LEA when one of the operands is an
undef virtual register. The problem is that ProcessImplicitDefs removes the definition of the register and marks all uses as undef. If we lose the undef marker then we get a register which has no def, is not marked as undef. The live interval analysis does not collect information for these virtual registers and we crash in later passes. Together with Michael Kuperstein <michael.m.kuperstein@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160260 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86InstrInfo.cpp7
-rw-r--r--test/CodeGen/X86/2012-07-16-LeaUndef.ll16
2 files changed, 23 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 9f5f66e37c..8ba3194505 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -2016,6 +2016,13 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
.addReg(Dest, RegState::Define |
getDeadRegState(isDead)),
Src, isKill, Src2, isKill2);
+
+ // Preserve undefness of the operands.
+ bool isUndef = MI->getOperand(1).isUndef();
+ bool isUndef2 = MI->getOperand(2).isUndef();
+ NewMI->getOperand(1).setIsUndef(isUndef);
+ NewMI->getOperand(3).setIsUndef(isUndef2);
+
if (LV && isKill2)
LV->replaceKillInstruction(Src2, MI, NewMI);
break;
diff --git a/test/CodeGen/X86/2012-07-16-LeaUndef.ll b/test/CodeGen/X86/2012-07-16-LeaUndef.ll
new file mode 100644
index 0000000000..9e5cbd2f33
--- /dev/null
+++ b/test/CodeGen/X86/2012-07-16-LeaUndef.ll
@@ -0,0 +1,16 @@
+; RUN: llc < %s -march=x86-64 -mcpu=corei7
+
+define void @autogen_SD2543() {
+A:
+ %E83 = add i32 0, 1
+ %E820 = add i32 0, undef
+ br label %C
+C:
+ %B908 = add i32 %E83, %E820
+ store i32 %B908, i32* undef
+ %Sl2391 = select i1 undef, i32 undef, i32 %E83
+ %Cmp3114 = icmp ne i32 %Sl2391, undef
+ br i1 %Cmp3114, label %C, label %G
+G:
+ ret void
+}