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authorEvan Cheng <evan.cheng@apple.com>2010-10-08 23:01:57 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-10-08 23:01:57 +0000
commitd82de8341c99c1756624020000bd51a03a5f355c (patch)
treece5ca99c6fab95a6f3ff61e98ce07c02fd6a4463
parenta32181a57d08f44767b6baf4e67e6860691b53fa (diff)
Avoid compiler warning: comparison between signed and unsigned integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116119 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/ScheduleDAGInstrs.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp
index c0fa9ddb46..537561d2b7 100644
--- a/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -529,7 +529,7 @@ void ScheduleDAGInstrs::ComputeOperandLatency(SUnit *Def, SUnit *Use,
if (DefIdx != -1) {
const MachineOperand &MO = DefMI->getOperand(DefIdx);
if (MO.isReg() && MO.isImplicit() &&
- DefIdx >= DefMI->getDesc().getNumOperands()) {
+ DefIdx >= (int)DefMI->getDesc().getNumOperands()) {
// This is an implicit def, getOperandLatency() won't return the correct
// latency. e.g.
// %D6<def>, %D7<def> = VLD1q16 %R2<kill>, 0, ..., %Q3<imp-def>