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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-12-06 20:40:34 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-12-06 20:40:34 +0000 |
| commit | cfb2815695051e30a93108b57038728ba1acc430 (patch) | |
| tree | e48dea680463ce156c168ddca41d25d49a83c276 | |
| parent | f8395ba4989d4b140cb11a877af5fb2f440135ca (diff) | |
OK, this does wonders for broken stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24624 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrFormats.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/Alpha/AlphaInstrFormats.td b/lib/Target/Alpha/AlphaInstrFormats.td index ed919cc762..cf7df80085 100644 --- a/lib/Target/Alpha/AlphaInstrFormats.td +++ b/lib/Target/Alpha/AlphaInstrFormats.td @@ -102,6 +102,7 @@ class BForm<bits<6> opcode, string asmstr> let Inst{25-21} = Ra; let Inst{20-0} = disp; } +let isBranch = 1, isTerminator = 1 in class BFormD<bits<6> opcode, string asmstr> : InstAlpha<opcode, (ops s21imm:$DISP), asmstr> { bits<5> Ra = 31; |