Remove llvm-upgrade and update tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47325 91177308-0d34-0410-b5e6-96231b3b80d8

51 files changed, 1302 insertions, 1306 deletions

diff --git a/test/CodeGen/PowerPC/constants.ll b/test/CodeGen/PowerPC/constants.ll
index 0c0d4edc15..b58f59a7eb 100644
--- a/test/CodeGen/PowerPC/constants.ll
+++ b/test/CodeGen/PowerPC/constants.ll
@@ -1,54 +1,52 @@
 ; All of these routines should be perform optimal load of constants.
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep lis | count 5
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep ori | count 3
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep {li } | count 4
 
-implementation   ; Functions:
-
-int %f1() {
+define i32 @f1() {
 entry:
-        ret int 1
+	ret i32 1
 }
 
-int %f2() {
+define i32 @f2() {
 entry:
-        ret int -1
+	ret i32 -1
 }
 
-int %f3() {
+define i32 @f3() {
 entry:
-        ret int 0
+	ret i32 0
 }
 
-int %f4() {
+define i32 @f4() {
 entry:
-        ret int 32767
+	ret i32 32767
 }
 
-int %f5() {
+define i32 @f5() {
 entry:
-        ret int 65535
+	ret i32 65535
 }
 
-int %f6() {
+define i32 @f6() {
 entry:
-        ret int 65536
+	ret i32 65536
 }
 
-int %f7() {
+define i32 @f7() {
 entry:
-        ret int 131071
+	ret i32 131071
 }
 
-int %f8() {
+define i32 @f8() {
 entry:
-        ret int 2147483647
+	ret i32 2147483647
 }
 
-int %f9() {
+define i32 @f9() {
 entry:
-        ret int -2147483648
+	ret i32 -2147483648
 }
diff --git a/test/CodeGen/PowerPC/cttz.ll b/test/CodeGen/PowerPC/cttz.ll
index 3751d6698e..2c51e8afa5 100644
--- a/test/CodeGen/PowerPC/cttz.ll
+++ b/test/CodeGen/PowerPC/cttz.ll
@@ -1,12 +1,11 @@
 ; Make sure this testcase does not use ctpop
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep -i cntlzw
+; RUN: llvm-as < %s | llc -march=ppc32 | grep -i cntlzw
 
-declare uint %llvm.cttz.i32(uint)
+declare i32 @llvm.cttz.i32(i32)
 
-implementation   ; Functions:
-
-uint %bar(uint %x) {
+define i32 @bar(i32 %x) {
 entry:
-	%tmp.1 = call uint %llvm.cttz.i32( uint %x ) 
-	ret uint %tmp.1
+        %tmp.1 = call i32 @llvm.cttz.i32( i32 %x )              ; <i32> [#uses=1]
+        ret i32 %tmp.1
 }
+
diff --git a/test/CodeGen/PowerPC/darwin-labels.ll b/test/CodeGen/PowerPC/darwin-labels.ll
index c8bf47c4cb..ceebc7099e 100644
--- a/test/CodeGen/PowerPC/darwin-labels.ll
+++ b/test/CodeGen/PowerPC/darwin-labels.ll
@@ -1,8 +1,6 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc | grep {foo bar":}
+; RUN: llvm-as < %s | llc | grep {foo bar":}
 
-target endian = big
-target pointersize = 32
+target datalayout = "E-p:32:32"
 target triple = "powerpc-apple-darwin8.2.0"
-
-"foo bar" = global int 4
+@"foo bar" = global i32 4               ; <i32*> [#uses=0]
 
diff --git a/test/CodeGen/PowerPC/div-2.ll b/test/CodeGen/PowerPC/div-2.ll
index a3cd73cbda..26e6221784 100644
--- a/test/CodeGen/PowerPC/div-2.ll
+++ b/test/CodeGen/PowerPC/div-2.ll
@@ -1,29 +1,30 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep srawi 
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep blr
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep srawi 
+; RUN: llvm-as < %s | llc -march=ppc32 | grep blr
 
-int %test1(int %X) {
-	%Y = and int %X, 15
-	%Z = div int %Y, 4
-	ret int %Z
+define i32 @test1(i32 %X) {
+        %Y = and i32 %X, 15             ; <i32> [#uses=1]
+        %Z = sdiv i32 %Y, 4             ; <i32> [#uses=1]
+        ret i32 %Z
 }
 
-int %test2(int %W) {
-	%X = and int %W, 15
-	%Y = sub int 16, %X
-	%Z = div int %Y, 4
-	ret int %Z
+define i32 @test2(i32 %W) {
+        %X = and i32 %W, 15             ; <i32> [#uses=1]
+        %Y = sub i32 16, %X             ; <i32> [#uses=1]
+        %Z = sdiv i32 %Y, 4             ; <i32> [#uses=1]
+        ret i32 %Z
 }
 
-int %test3(int %W) {
-	%X = and int %W, 15
-	%Y = sub int 15, %X
-	%Z = div int %Y, 4
-	ret int %Z
+define i32 @test3(i32 %W) {
+        %X = and i32 %W, 15             ; <i32> [#uses=1]
+        %Y = sub i32 15, %X             ; <i32> [#uses=1]
+        %Z = sdiv i32 %Y, 4             ; <i32> [#uses=1]
+        ret i32 %Z
 }
 
-int %test4(int %W) {
-	%X = and int %W, 2
-	%Y = sub int 5, %X
-	%Z = div int %Y, 2
-	ret int %Z
+define i32 @test4(i32 %W) {
+        %X = and i32 %W, 2              ; <i32> [#uses=1]
+        %Y = sub i32 5, %X              ; <i32> [#uses=1]
+        %Z = sdiv i32 %Y, 2             ; <i32> [#uses=1]
+        ret i32 %Z
 }
+
diff --git a/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll b/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll
index 30bd0b4d0b..7be8a34be7 100644
--- a/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll
+++ b/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll
@@ -1,94 +1,93 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep eqv | count 3
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | \
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | \
 ; RUN:   grep andc | count 3
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep orc | count 2
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | \
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | \
 ; RUN:   grep nor | count 3
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep nand | count 1
 
-int %EQV1(int %X, int %Y) {
-	%A = xor int %X, %Y
-	%B = xor int %A, -1
-	ret int %B
+define i32 @EQV1(i32 %X, i32 %Y) {
+	%A = xor i32 %X, %Y		; <i32> [#uses=1]
+	%B = xor i32 %A, -1		; <i32> [#uses=1]
+	ret i32 %B
 }
 
-int %EQV2(int %X, int %Y) {
-	%A = xor int %X, -1
-	%B = xor int %A, %Y
-	ret int %B
+define i32 @EQV2(i32 %X, i32 %Y) {
+	%A = xor i32 %X, -1		; <i32> [#uses=1]
+	%B = xor i32 %A, %Y		; <i32> [#uses=1]
+	ret i32 %B
 }
 
-int %EQV3(int %X, int %Y) {
-	%A = xor int %X, -1
-	%B = xor int %Y, %A
-	ret int %B
+define i32 @EQV3(i32 %X, i32 %Y) {
+	%A = xor i32 %X, -1		; <i32> [#uses=1]
+	%B = xor i32 %Y, %A		; <i32> [#uses=1]
+	ret i32 %B
 }
 
-int %ANDC1(int %X, int %Y) {
-	%A = xor int %Y, -1
-	%B = and int %X, %A
-	ret int %B
+define i32 @ANDC1(i32 %X, i32 %Y) {
+	%A = xor i32 %Y, -1		; <i32> [#uses=1]
+	%B = and i32 %X, %A		; <i32> [#uses=1]
+	ret i32 %B
 }
 
-int %ANDC2(int %X, int %Y) {
-	%A = xor int %X, -1
-	%B = and int %A, %Y
-	ret int %B
+define i32 @ANDC2(i32 %X, i32 %Y) {
+	%A = xor i32 %X, -1		; <i32> [#uses=1]
+	%B = and i32 %A, %Y		; <i32> [#uses=1]
+	ret i32 %B
 }
 
-int %ORC1(int %X, int %Y) {
-	%A = xor int %Y, -1
-	%B = or  int %X, %A
-	ret int %B
+define i32 @ORC1(i32 %X, i32 %Y) {
+	%A = xor i32 %Y, -1		; <i32> [#uses=1]
+	%B = or i32 %X, %A		; <i32> [#uses=1]
+	ret i32 %B
 }
 
-int %ORC2(int %X, int %Y) {
-	%A = xor int %X, -1
-	%B = or  int %A, %Y
-	ret int %B
+define i32 @ORC2(i32 %X, i32 %Y) {
+	%A = xor i32 %X, -1		; <i32> [#uses=1]
+	%B = or i32 %A, %Y		; <i32> [#uses=1]
+	ret i32 %B
 }
 
-int %NOR1(int %X) {
-        %Y = xor int %X, -1
-        ret int %Y
+define i32 @NOR1(i32 %X) {
+	%Y = xor i32 %X, -1		; <i32> [#uses=1]
+	ret i32 %Y
 }
 
-int %NOR2(int %X, int %Y) {
-        %Z = or int %X, %Y
-        %R = xor int %Z, -1
-        ret int %R
+define i32 @NOR2(i32 %X, i32 %Y) {
+	%Z = or i32 %X, %Y		; <i32> [#uses=1]
+	%R = xor i32 %Z, -1		; <i32> [#uses=1]
+	ret i32 %R
 }
 
-int %NAND1(int %X, int %Y) {
-	%Z = and int %X, %Y
-	%W = xor int %Z, -1
-	ret int %W
+define i32 @NAND1(i32 %X, i32 %Y) {
+	%Z = and i32 %X, %Y		; <i32> [#uses=1]
+	%W = xor i32 %Z, -1		; <i32> [#uses=1]
+	ret i32 %W
 }
 
-void %VNOR(<4 x float>* %P, <4 x float>* %Q) {
-        %tmp = load <4 x float>* %P
-        %tmp = cast <4 x float> %tmp to <4 x int>
-        %tmp2 = load <4 x float>* %Q
-        %tmp2 = cast <4 x float> %tmp2 to <4 x int>
-        %tmp3 = or <4 x int> %tmp, %tmp2
-        %tmp4 = xor <4 x int> %tmp3, < int -1, int -1, int -1, int -1 >
-        %tmp4 = cast <4 x int> %tmp4 to <4 x float>
-        store <4 x float> %tmp4, <4 x float>* %P
-        ret void
+define void @VNOR(<4 x float>* %P, <4 x float>* %Q) {
+	%tmp = load <4 x float>* %P		; <<4 x float>> [#uses=1]
+	%tmp.upgrd.1 = bitcast <4 x float> %tmp to <4 x i32>		; <<4 x i32>> [#uses=1]
+	%tmp2 = load <4 x float>* %Q		; <<4 x float>> [#uses=1]
+	%tmp2.upgrd.2 = bitcast <4 x float> %tmp2 to <4 x i32>		; <<4 x i32>> [#uses=1]
+	%tmp3 = or <4 x i32> %tmp.upgrd.1, %tmp2.upgrd.2		; <<4 x i32>> [#uses=1]
+	%tmp4 = xor <4 x i32> %tmp3, < i32 -1, i32 -1, i32 -1, i32 -1 >		; <<4 x i32>> [#uses=1]
+	%tmp4.upgrd.3 = bitcast <4 x i32> %tmp4 to <4 x float>		; <<4 x float>> [#uses=1]
+	store <4 x float> %tmp4.upgrd.3, <4 x float>* %P
+	ret void
 }
 
-void %VANDC(<4 x float>* %P, <4 x float>* %Q) {
-        %tmp = load <4 x float>* %P
-        %tmp = cast <4 x float> %tmp to <4 x int>
-        %tmp2 = load <4 x float>* %Q
-        %tmp2 = cast <4 x float> %tmp2 to <4 x int>
-        %tmp4 = xor <4 x int> %tmp2, < int -1, int -1, int -1, int -1 >
-        %tmp3 = and <4 x int> %tmp, %tmp4
-        %tmp4 = cast <4 x int> %tmp3 to <4 x float>
-        store <4 x float> %tmp4, <4 x float>* %P
-        ret void
+define void @VANDC(<4 x float>* %P, <4 x float>* %Q) {
+	%tmp = load <4 x float>* %P		; <<4 x float>> [#uses=1]
+	%tmp.upgrd.4 = bitcast <4 x float> %tmp to <4 x i32>		; <<4 x i32>> [#uses=1]
+	%tmp2 = load <4 x float>* %Q		; <<4 x float>> [#uses=1]
+	%tmp2.upgrd.5 = bitcast <4 x float> %tmp2 to <4 x i32>		; <<4 x i32>> [#uses=1]
+	%tmp4 = xor <4 x i32> %tmp2.upgrd.5, < i32 -1, i32 -1, i32 -1, i32 -1 >		; <<4 x i32>> [#uses=1]
+	%tmp3 = and <4 x i32> %tmp.upgrd.4, %tmp4		; <<4 x i32>> [#uses=1]
+	%tmp4.upgrd.6 = bitcast <4 x i32> %tmp3 to <4 x float>		; <<4 x float>> [#uses=1]
+	store <4 x float> %tmp4.upgrd.6, <4 x float>* %P
+	ret void
 }
-
diff --git a/test/CodeGen/PowerPC/extsh.ll b/test/CodeGen/PowerPC/extsh.ll
index 6b5023fee3..5eca8cea36 100644
--- a/test/CodeGen/PowerPC/extsh.ll
+++ b/test/CodeGen/PowerPC/extsh.ll
@@ -1,7 +1,8 @@
 ; This should turn into a single extsh
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep extsh | count 1
-int %test(int %X) {
-        %tmp.81 = shl int %X, ubyte 16             ; <int> [#uses=1]
-        %tmp.82 = shr int %tmp.81, ubyte 16             ; <int> [#uses=1]
-        ret int %tmp.82
+; RUN: llvm-as < %s | llc -march=ppc32 | grep extsh | count 1
+define i32 @test(i32 %X) {
+        %tmp.81 = shl i32 %X, 16                ; <i32> [#uses=1]
+        %tmp.82 = ashr i32 %tmp.81, 16          ; <i32> [#uses=1]
+        ret i32 %tmp.82
 }
+
diff --git a/test/CodeGen/PowerPC/fma.ll b/test/CodeGen/PowerPC/fma.ll
index da571f6672..fd9bd74007 100644
--- a/test/CodeGen/PowerPC/fma.ll
+++ b/test/CodeGen/PowerPC/fma.ll
@@ -1,47 +1,54 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   egrep {fn?madd|fn?msub} | count 8
 
-double %test_FMADD1(double %A, double %B, double %C) {
-	%D = mul double %A, %B
-	%E = add double %D, %C
+define double @test_FMADD1(double %A, double %B, double %C) {
+	%D = mul double %A, %B		; <double> [#uses=1]
+	%E = add double %D, %C		; <double> [#uses=1]
 	ret double %E
 }
-double %test_FMADD2(double %A, double %B, double %C) {
-	%D = mul double %A, %B
-	%E = add double %D, %C
+
+define double @test_FMADD2(double %A, double %B, double %C) {
+	%D = mul double %A, %B		; <double> [#uses=1]
+	%E = add double %D, %C		; <double> [#uses=1]
 	ret double %E
 }
-double %test_FMSUB(double %A, double %B, double %C) {
-	%D = mul double %A, %B
-	%E = sub double %D, %C
+
+define double @test_FMSUB(double %A, double %B, double %C) {
+	%D = mul double %A, %B		; <double> [#uses=1]
+	%E = sub double %D, %C		; <double> [#uses=1]
 	ret double %E
 }
-double %test_FNMADD1(double %A, double %B, double %C) {
-	%D = mul double %A, %B
-	%E = add double %D, %C
-	%F = sub double -0.0, %E
+
+define double @test_FNMADD1(double %A, double %B, double %C) {
+	%D = mul double %A, %B		; <double> [#uses=1]
+	%E = add double %D, %C		; <double> [#uses=1]
+	%F = sub double -0.000000e+00, %E		; <double> [#uses=1]
 	ret double %F
 }
-double %test_FNMADD2(double %A, double %B, double %C) {
-	%D = mul double %A, %B
-	%E = add double %C, %D
-	%F = sub double -0.0, %E
+
+define double @test_FNMADD2(double %A, double %B, double %C) {
+	%D = mul double %A, %B		; <double> [#uses=1]
+	%E = add double %C, %D		; <double> [#uses=1]
+	%F = sub double -0.000000e+00, %E		; <double> [#uses=1]
 	ret double %F
 }
-double %test_FNMSUB1(double %A, double %B, double %C) {
-	%D = mul double %A, %B
-	%E = sub double %C, %D
+
+define double @test_FNMSUB1(double %A, double %B, double %C) {
+	%D = mul double %A, %B		; <double> [#uses=1]
+	%E = sub double %C, %D		; <double> [#uses=1]
 	ret double %E
 }
-double %test_FNMSUB2(double %A, double %B, double %C) {
-	%D = mul double %A, %B
-	%E = sub double %D, %C
-	%F = sub double -0.0, %E
+
+define double @test_FNMSUB2(double %A, double %B, double %C) {
+	%D = mul double %A, %B		; <double> [#uses=1]
+	%E = sub double %D, %C		; <double> [#uses=1]
+	%F = sub double -0.000000e+00, %E		; <double> [#uses=1]
 	ret double %F
 }
-float %test_FNMSUBS(float %A, float %B, float %C) {
-	%D = mul float %A, %B
-	%E = sub float %D, %C
-	%F = sub float -0.0, %E
+
+define float @test_FNMSUBS(float %A, float %B, float %C) {
+	%D = mul float %A, %B		; <float> [#uses=1]
+	%E = sub float %D, %C		; <float> [#uses=1]
+	%F = sub float -0.000000e+00, %E		; <float> [#uses=1]
 	ret float %F
 }
diff --git a/test/CodeGen/PowerPC/fnabs.ll b/test/CodeGen/PowerPC/fnabs.ll
index 5d0ef5f66d..b9517de28f 100644
--- a/test/CodeGen/PowerPC/fnabs.ll
+++ b/test/CodeGen/PowerPC/fnabs.ll
@@ -1,11 +1,10 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fnabs
+; RUN: llvm-as < %s | llc -march=ppc32 | grep fnabs
 
-declare double %fabs(double)
+declare double @fabs(double)
 
-implementation
-
-double %test(double %X) {
-	%Y = call double %fabs(double %X)
-	%Z = sub double -0.0, %Y
-	ret double %Z
+define double @test(double %X) {
+        %Y = call double @fabs( double %X )             ; <double> [#uses=1]
+        %Z = sub double -0.000000e+00, %Y               ; <double> [#uses=1]
+        ret double %Z
 }
+
diff --git a/test/CodeGen/PowerPC/fnegsel.ll b/test/CodeGen/PowerPC/fnegsel.ll
index b1b06453aa..c223a496ab 100644
--- a/test/CodeGen/PowerPC/fnegsel.ll
+++ b/test/CodeGen/PowerPC/fnegsel.ll
@@ -1,8 +1,9 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep fneg
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep fneg
 
-double %test_FNEG_sel(double %A, double %B, double %C) {
-    %D = sub double -0.0, %A
-    %Cond = setgt double %D, -0.0
-    %E = select bool %Cond, double %B, double %C
-	ret double %E
+define double @test_FNEG_sel(double %A, double %B, double %C) {
+        %D = sub double -0.000000e+00, %A               ; <double> [#uses=1]
+        %Cond = fcmp ogt double %D, -0.000000e+00               ; <i1> [#uses=1]
+        %E = select i1 %Cond, double %B, double %C              ; <double> [#uses=1]
+        ret double %E
 }
+
diff --git a/test/CodeGen/PowerPC/fold-li.ll b/test/CodeGen/PowerPC/fold-li.ll
index 66a900faf0..e96bc456c5 100644
--- a/test/CodeGen/PowerPC/fold-li.ll
+++ b/test/CodeGen/PowerPC/fold-li.ll
@@ -1,14 +1,15 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep -v align | not grep li
 
 ;; Test that immediates are folded into these instructions correctly.
 
-int %ADD(int %X) {
-	%Y = add int %X, 65537
-	ret int %Y
+define i32 @ADD(i32 %X) {
+        %Y = add i32 %X, 65537          ; <i32> [#uses=1]
+        ret i32 %Y
 }
 
-int %SUB(int %X) {
-	%Y = sub int %X, 65537
-	ret int %Y
+define i32 @SUB(i32 %X) {
+        %Y = sub i32 %X, 65537          ; <i32> [#uses=1]
+        ret i32 %Y
 }
+
diff --git a/test/CodeGen/PowerPC/fp-branch.ll b/test/CodeGen/PowerPC/fp-branch.ll
index 804cbf6f8c..3db6ced572 100644
--- a/test/CodeGen/PowerPC/fp-branch.ll
+++ b/test/CodeGen/PowerPC/fp-branch.ll
@@ -1,20 +1,21 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fcmp | count 1
+; RUN: llvm-as < %s | llc -march=ppc32 | grep fcmp | count 1
 
-declare bool %llvm.isunordered.f64(double, double)
+declare i1 @llvm.isunordered.f64(double, double)
 
-bool %intcoord_cond_next55(double %tmp48.reload) {
+define i1 @intcoord_cond_next55(double %tmp48.reload) {
 newFuncRoot:
-	br label %cond_next55
+        br label %cond_next55
 
-bb72.exitStub:		; preds = %cond_next55
-	ret bool true
+bb72.exitStub:          ; preds = %cond_next55
+        ret i1 true
 
-cond_next62.exitStub:		; preds = %cond_next55
-	ret bool false
+cond_next62.exitStub:           ; preds = %cond_next55
+        ret i1 false
 
-cond_next55:		; preds = %newFuncRoot
-	%tmp57 = setge double %tmp48.reload, 1.000000e+00		; <bool> [#uses=1]
-	%tmp58 = tail call bool %llvm.isunordered.f64( double %tmp48.reload, double 1.000000e+00 )		; <bool> [#uses=1]
-	%tmp59 = or bool %tmp57, %tmp58		; <bool> [#uses=1]
-	br bool %tmp59, label %bb72.exitStub, label %cond_next62.exitStub
+cond_next55:            ; preds = %newFuncRoot
+        %tmp57 = fcmp oge double %tmp48.reload, 1.000000e+00            ; <i1> [#uses=1]
+        %tmp58 = fcmp uno double %tmp48.reload, 1.000000e+00            ; <i1> [#uses=1]
+        %tmp59 = or i1 %tmp57, %tmp58           ; <i1> [#uses=1]
+        br i1 %tmp59, label %bb72.exitStub, label %cond_next62.exitStub
 }
+
diff --git a/test/CodeGen/PowerPC/fp-int-fp.ll b/test/CodeGen/PowerPC/fp-int-fp.ll
index 63ebc494eb..1b78b01e6c 100644
--- a/test/CodeGen/PowerPC/fp-int-fp.ll
+++ b/test/CodeGen/PowerPC/fp-int-fp.ll
@@ -1,26 +1,27 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep r1
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | not grep r1
 
-double %test1(double %X) {
-        %Y = cast double %X to long
-        %Z = cast long %Y to double
+define double @test1(double %X) {
+        %Y = fptosi double %X to i64            ; <i64> [#uses=1]
+        %Z = sitofp i64 %Y to double            ; <double> [#uses=1]
         ret double %Z
 }
 
-float %test2(double %X) {
-        %Y = cast double %X to long
-        %Z = cast long %Y to float
+define float @test2(double %X) {
+        %Y = fptosi double %X to i64            ; <i64> [#uses=1]
+        %Z = sitofp i64 %Y to float             ; <float> [#uses=1]
         ret float %Z
 }
 
-double %test3(float %X) {
-        %Y = cast float %X to long
-        %Z = cast long %Y to double
+define double @test3(float %X) {
+        %Y = fptosi float %X to i64             ; <i64> [#uses=1]
+        %Z = sitofp i64 %Y to double            ; <double> [#uses=1]
         ret double %Z
 }
 
-float %test4(float %X) {
-        %Y = cast float %X to long
-        %Z = cast long %Y to float
+define float @test4(float %X) {
+        %Y = fptosi float %X to i64             ; <i64> [#uses=1]
+        %Z = sitofp i64 %Y to float             ; <float> [#uses=1]
         ret float %Z
 }
 
+
diff --git a/test/CodeGen/PowerPC/fp_to_uint.ll b/test/CodeGen/PowerPC/fp_to_uint.ll
index 4a766170d9..43502bbb3e 100644
--- a/test/CodeGen/PowerPC/fp_to_uint.ll
+++ b/test/CodeGen/PowerPC/fp_to_uint.ll
@@ -1,9 +1,8 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep fctiwz | count 1
+; RUN: llvm-as < %s | llc -march=ppc32 | grep fctiwz | count 1
 
-implementation
-
-ushort %foo(float %a) {
+define i16 @foo(float %a) {
 entry:
-        %tmp.1 = cast float %a to ushort
-        ret ushort %tmp.1
+        %tmp.1 = fptoui float %a to i16         ; <i16> [#uses=1]
+        ret i16 %tmp.1
 }
+
diff --git a/test/CodeGen/PowerPC/fpcopy.ll b/test/CodeGen/PowerPC/fpcopy.ll
index ce86da824b..7d8059645a 100644
--- a/test/CodeGen/PowerPC/fpcopy.ll
+++ b/test/CodeGen/PowerPC/fpcopy.ll
@@ -1,6 +1,7 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep fmr
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep fmr
 
-double %test(float %F) {
-	%F = cast float %F to double
-	ret double %F