diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-03-30 01:12:05 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-03-30 01:12:05 +0000 |
| commit | cbcdcfbda5c60d5ac7a492ef8f90b325b6026bd1 (patch) | |
| tree | 7127fc004fe3231e7d2074243f51336bd1928061 | |
| parent | 8f4d3800a7e6f546279bc7b7f418693fc7484d54 (diff) | |
[mips] Implement getRepRegClassFor in MipsSETargetLowering. This function is
called in several places in ScheduleDAGRRList.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178393 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Mips/MipsSEISelLowering.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsSEISelLowering.h b/lib/Target/Mips/MipsSEISelLowering.h index 04a28ce54c..e1f949f247 100644 --- a/lib/Target/Mips/MipsSEISelLowering.h +++ b/lib/Target/Mips/MipsSEISelLowering.h @@ -15,6 +15,7 @@ #define MipsSEISELLOWERING_H #include "MipsISelLowering.h" +#include "MipsRegisterInfo.h" namespace llvm { class MipsSETargetLowering : public MipsTargetLowering { @@ -26,6 +27,14 @@ namespace llvm { virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const; + virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const { + if (VT == MVT::Untyped) + return Subtarget->hasDSP() ? &Mips::ACRegsDSPRegClass : + &Mips::ACRegsRegClass; + + return TargetLowering::getRepRegClassFor(VT); + } + private: virtual bool isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo, |