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author | Chris Lattner <sabre@nondot.org> | 2006-02-08 07:12:07 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-02-08 07:12:07 +0000 |
commit | cb298907ab2b84a59bed5f924d54007c9cc96704 (patch) | |
tree | d6c6657846644cab26d53a1593ec3f4a3a3563e1 | |
parent | 4d73a5a204b2e9f409347102fc0701e5b68699cb (diff) |
more email -> README moving
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26054 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/README.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt index 7bff7fea57..8481fa6f2c 100644 --- a/lib/Target/X86/README.txt +++ b/lib/Target/X86/README.txt @@ -93,6 +93,10 @@ Some isel ideas: 2. Code duplication (addressing mode) during isel. 3. Other ideas from "Register-Sensitive Selection, Duplication, and Sequencing of Instructions". +4. Scheduling for reduced register pressure. E.g. "Minimum Register + Instruction Sequence Problem: Revisiting Optimal Code Generation for DAGs" + and other related papers. + http://citeseer.ist.psu.edu/govindarajan01minimum.html //===---------------------------------------------------------------------===// |