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| author | Evan Cheng <evan.cheng@apple.com> | 2010-05-24 18:00:18 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-05-24 18:00:18 +0000 |
| commit | c7cf10c97ef08dc3dbe917e16908cc9bd3d888e6 (patch) | |
| tree | 86a8abcfb1ef69514384bb521b3edd3cb43b661a | |
| parent | a1132276e7513aa08e4f099039243b93e029ccf6 (diff) | |
LR is in GPR, not tGPR even in Thumb1 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104518 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 5 | ||||
| -rw-r--r-- | test/CodeGen/ARM/arm-returnaddr.ll | 2 |
2 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 21042da1a9..768ffb9b6d 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -2158,10 +2158,7 @@ SDValue ARMTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{ } // Return LR, which contains the return address. Mark it an implicit live-in. - ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); - TargetRegisterClass *RC = AFI->isThumb1OnlyFunction() - ? ARM::tGPRRegisterClass : ARM::GPRRegisterClass; - unsigned Reg = MF.addLiveIn(ARM::LR, RC); + unsigned Reg = MF.addLiveIn(ARM::LR, ARM::GPRRegisterClass); return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, VT); } diff --git a/test/CodeGen/ARM/arm-returnaddr.ll b/test/CodeGen/ARM/arm-returnaddr.ll index 5bf476dbf8..2c8f2abb97 100644 --- a/test/CodeGen/ARM/arm-returnaddr.ll +++ b/test/CodeGen/ARM/arm-returnaddr.ll @@ -1,5 +1,7 @@ ; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=thumbv6-apple-darwin ; rdar://8015977 +; rdar://8020118 define arm_apcscc i8* @rt0(i32 %x) nounwind readnone { entry: |