diff options
author | Reed Kotler <rkotler@mips.com> | 2012-12-20 05:09:15 +0000 |
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committer | Reed Kotler <rkotler@mips.com> | 2012-12-20 05:09:15 +0000 |
commit | c28ee9622a4348c9d7a18d34fecc029f5817a5e2 (patch) | |
tree | 7fb828948da7ff857d943911a6fbc4df0f6e6c7d | |
parent | 1f23239c5bdbeb45a612238acd48bb497b3cce15 (diff) |
This assert is overly restrictive and does not work for mips16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170667 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 3fad6eec92..e3abd3e1af 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -1048,7 +1048,6 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const static unsigned AddLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) { - assert(RC->contains(PReg) && "Not the correct regclass!"); unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); MF.getRegInfo().addLiveIn(PReg, VReg); return VReg; |