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| author | Zhongxing Xu <xuzhongxing@gmail.com> | 2010-05-26 08:10:02 +0000 |
|---|---|---|
| committer | Zhongxing Xu <xuzhongxing@gmail.com> | 2010-05-26 08:10:02 +0000 |
| commit | c2798a18a779b7aa71dda714349ff41eb6679d9f (patch) | |
| tree | 4834f817a487c2f4d11800aad34a3ccebee3e96c | |
| parent | e614e393c7f80a39430b8a69813f5fd1f4c77cf9 (diff) | |
SRetReturnReg was set in LowerFormalArguments(). So only assert it here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104691 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index c0813f323c..b02c33d3f8 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1259,10 +1259,8 @@ X86TargetLowering::LowerReturn(SDValue Chain, MachineFunction &MF = DAG.getMachineFunction(); X86MachineFunctionInfo *FuncInfo = MF.getInfo<X86MachineFunctionInfo>(); unsigned Reg = FuncInfo->getSRetReturnReg(); - if (!Reg) { - Reg = MRI.createVirtualRegister(getRegClassFor(MVT::i64)); - FuncInfo->setSRetReturnReg(Reg); - } + assert(Reg && + "SRetReturnReg should have been set in LowerFormalArguments()."); SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy()); Chain = DAG.getCopyToReg(Chain, dl, X86::RAX, Val, Flag); |