diff options
| author | Nate Begeman <natebegeman@mac.com> | 2005-08-18 23:38:00 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2005-08-18 23:38:00 +0000 |
| commit | c15ed447f494c77a76c24661893e22192ebb2103 (patch) | |
| tree | c61a914e66722012f79eb272b5f54ac7bf94cd19 | |
| parent | 45fcb8f410dd00ea9df9234fdff151593713ca79 (diff) | |
Add shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22884 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 3265b0a960..c02336273f 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -486,6 +486,51 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) { CurDAG->SelectNodeTo(N, MVT::i32, PPC::XOR, Select(N->getOperand(0)), Select(N->getOperand(1))); break; + case ISD::SHL: { + unsigned Imm, SH, MB, ME; + if (isOpcWithIntImmediate(N->getOperand(0).Val, ISD::AND, Imm) && + isRotateAndMask(N, Imm, true, SH, MB, ME)) + CurDAG->SelectNodeTo(N, MVT::i32, PPC::RLWINM, + Select(N->getOperand(0).getOperand(0)), + getI32Imm(SH), getI32Imm(MB), getI32Imm(ME)); + else if (isIntImmediate(N->getOperand(1), Imm)) + CurDAG->SelectNodeTo(N, MVT::i32, PPC::RLWINM, Select(N->getOperand(0)), + getI32Imm(Imm), getI32Imm(0), getI32Imm(31-Imm)); + else + CurDAG->SelectNodeTo(N, MVT::i32, PPC::SLW, Select(N->getOperand(0)), + Select(N->getOperand(1))); + break; + } + case ISD::SRL: { + unsigned Imm, SH, MB, ME; + if (isOpcWithIntImmediate(N->getOperand(0).Val, ISD::AND, Imm) && + isRotateAndMask(N, Imm, true, SH, MB, ME)) + CurDAG->SelectNodeTo(N, MVT::i32, PPC::RLWINM, + Select(N->getOperand(0).getOperand(0)), + getI32Imm(SH), getI32Imm(MB), getI32Imm(ME)); + else if (isIntImmediate(N->getOperand(1), Imm)) + CurDAG->SelectNodeTo(N, MVT::i32, PPC::RLWINM, Select(N->getOperand(0)), + getI32Imm(32-Imm), getI32Imm(Imm), getI32Imm(31)); + else + CurDAG->SelectNodeTo(N, MVT::i32, PPC::SRW, Select(N->getOperand(0)), + Select(N->getOperand(1))); + break; + } + case ISD::SRA: { + unsigned Imm, SH, MB, ME; + if (isOpcWithIntImmediate(N->getOperand(0).Val, ISD::AND, Imm) && + isRotateAndMask(N, Imm, true, SH, MB, ME)) + CurDAG->SelectNodeTo(N, MVT::i32, PPC::RLWINM, + Select(N->getOperand(0).getOperand(0)), + getI32Imm(SH), getI32Imm(MB), getI32Imm(ME)); + else if (isIntImmediate(N->getOperand(1), Imm)) + CurDAG->SelectNodeTo(N, MVT::i32, PPC::SRAWI, Select(N->getOperand(0)), + getI32Imm(Imm)); + else + CurDAG->SelectNodeTo(N, MVT::i32, PPC::SRAW, Select(N->getOperand(0)), + Select(N->getOperand(1))); + break; + } case ISD::FABS: CurDAG->SelectNodeTo(N, N->getValueType(0), PPC::FABS, Select(N->getOperand(0))); |