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| author | Jim Grosbach <grosbach@apple.com> | 2011-09-15 22:34:29 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-09-15 22:34:29 +0000 |
| commit | c075d45364190dfe06eda8aa93b6856d4f55f107 (patch) | |
| tree | 439955c4dfb1222bbe75b40c65288929a362b08b | |
| parent | 74bf18cceaa4d83c816ffda04592c00a16de60c4 (diff) | |
Thumb2 assembly parsing and encoding for SHASX/SHSAX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139870 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 4 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 36 |
2 files changed, 40 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 72793e0e33..c5e4b8653c 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -4946,6 +4946,10 @@ def : MnemonicAlias<"srs", "srsia">; def : MnemonicAlias<"qsubaddx", "qsax">; // SASX == SADDSUBX def : MnemonicAlias<"saddsubx", "sasx">; +// SHASX == SHADDSUBX +def : MnemonicAlias<"shaddsubx", "shasx">; +// SHSAX == SHSUBADDX +def : MnemonicAlias<"shsubaddx", "shsax">; // LDRSBT/LDRHT/LDRSHT post-index offset if optional. // Note that the write-back output register is a dummy operand for MC (it's diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 718189cad4..466bebf6d7 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -1679,6 +1679,42 @@ _func: @------------------------------------------------------------------------------ +@ SHASX +@------------------------------------------------------------------------------ + shasx r4, r8, r2 + it gt + shasxgt r4, r8, r2 + shaddsubx r4, r8, r2 + it gt + shaddsubxgt r4, r8, r2 + +@ CHECK: shasx r4, r8, r2 @ encoding: [0xa8,0xfa,0x22,0xf4] +@ CHECK: it gt @ encoding: [0xc8,0xbf] +@ CHECK: shasxgt r4, r8, r2 @ encoding: [0xa8,0xfa,0x22,0xf4] +@ CHECK: shasx r4, r8, r2 @ encoding: [0xa8,0xfa,0x22,0xf4] +@ CHECK: it gt @ encoding: [0xc8,0xbf] +@ CHECK: shasxgt r4, r8, r2 @ encoding: [0xa8,0xfa,0x22,0xf4] + + +@------------------------------------------------------------------------------ +@ SHASX +@------------------------------------------------------------------------------ + shsax r4, r8, r2 + it gt + shsaxgt r4, r8, r2 + shsubaddx r4, r8, r2 + it gt + shsubaddxgt r4, r8, r2 + +@ CHECK: shsax r4, r8, r2 @ encoding: [0xe8,0xfa,0x22,0xf4] +@ CHECK: it gt @ encoding: [0xc8,0xbf] +@ CHECK: shsaxgt r4, r8, r2 @ encoding: [0xe8,0xfa,0x22,0xf4] +@ CHECK: shsax r4, r8, r2 @ encoding: [0xe8,0xfa,0x22,0xf4] +@ CHECK: it gt @ encoding: [0xc8,0xbf] +@ CHECK: shsaxgt r4, r8, r2 @ encoding: [0xe8,0xfa,0x22,0xf4] + + +@------------------------------------------------------------------------------ @ SUB (register) @------------------------------------------------------------------------------ sub.w r5, r2, r12, rrx |