aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2011-08-31 21:17:31 +0000
committerJim Grosbach <grosbach@apple.com>2011-08-31 21:17:31 +0000
commitc075510e43f768e79f0d66374f4d60529c4d3d85 (patch)
treed546aff0837a7ab6808969875316d3066db961c0
parentfc7bc5889b52b82a003fb0c184d7cc7d3807f0dd (diff)
Thumb2 t2Bcc should encode as t2B when condition is 'always'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138898 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index bd3e8711ec..96ce5cd449 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3478,6 +3478,11 @@ processInstruction(MCInst &Inst,
if (Inst.getOperand(3).getImm() < 8 && Operands.size() == 6)
Inst.setOpcode(ARM::tADDi3);
break;
+ case ARM::t2Bcc:
+ // If the conditional is AL, we really want t2B.
+ if (Inst.getOperand(1).getImm() == ARMCC::AL)
+ Inst.setOpcode(ARM::t2B);
+ break;
case ARM::tBcc:
// If the conditional is AL, we really want tB.
if (Inst.getOperand(1).getImm() == ARMCC::AL)