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authorChris Lattner <sabre@nondot.org>2004-11-22 21:25:10 +0000
committerChris Lattner <sabre@nondot.org>2004-11-22 21:25:10 +0000
commitbefc374904cc15968e43631d48fa19c9902b80cf (patch)
tree5e2807da73989b800e96df3df0c0660eb33275bd
parente1df212fb3eb651a85ee1e0f493a9f27033901cb (diff)
Implement a disgusting hack to work around broken machine code emission of
the RDCCR instruction. This fixes a bunch of programs with the JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18124 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/SparcV9/SparcV9CodeEmitter.cpp13
1 files changed, 12 insertions, 1 deletions
diff --git a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
index 7759874ce9..89e0a5db86 100644
--- a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
+++ b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
@@ -292,7 +292,18 @@ void SparcV9CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
currBB = MBB.getBasicBlock();
BBLocations[currBB] = MCE.getCurrentPCValue();
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
- emitWord(getBinaryCodeForInstr(*I));
+ if (I->getOpcode() != V9::RDCCR) {
+ emitWord(getBinaryCodeForInstr(*I));
+ } else {
+ // FIXME: The tblgen produced code emitter cannot deal with the fact that
+ // machine operand #0 of the RDCCR instruction should be ignored. This is
+ // really a bug in the representation of the RDCCR instruction (which has
+ // no need to explicitly represent the CCR dest), but we hack around it
+ // here.
+ unsigned RegNo = getMachineOpValue(*I, I->getOperand(1));
+ RegNo &= (1<<5)-1;
+ emitWord((RegNo << 25) | 2168487936U);
+ }
}