diff options
author | Chris Lattner <sabre@nondot.org> | 2006-04-11 01:38:39 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2006-04-11 01:38:39 +0000 |
commit | bee9836c0f21be0bd5034f60caa9594c3949910d (patch) | |
tree | c79716f6056392fb7824f2a275e2fb9e84b70e1f | |
parent | f87324e44de88da5b3d57d6aeda5bc9d30f86374 (diff) |
Vector function results go into V2 according to GCC. The darwin ABI doc
doesn't say where they go :-/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27579 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index f7643b8407..99de51bf77 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -877,7 +877,16 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { return SDOperand(); // ret void is legal case 2: { MVT::ValueType ArgVT = Op.getOperand(1).getValueType(); - unsigned ArgReg = MVT::isInteger(ArgVT) ? PPC::R3 : PPC::F1; + unsigned ArgReg; + if (MVT::isVector(ArgVT)) + ArgReg = PPC::V2; + else if (MVT::isInteger(ArgVT)) + ArgReg = PPC::R3; + else { + assert(MVT::isFloatingPoint(ArgVT)); + ArgReg = PPC::F1; + } + Copy = DAG.getCopyToReg(Op.getOperand(0), ArgReg, Op.getOperand(1), SDOperand()); |