Removed tabs everywhere except autogenerated & external files. Add make

target for tabs checking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8

41 files changed, 392 insertions, 378 deletions

diff --git a/Makefile.rules b/Makefile.rules
index 723fefcaf8..56373c0edc 100644
--- a/Makefile.rules
+++ b/Makefile.rules
@@ -1726,8 +1726,10 @@ endif
 endif
 
 check-line-length:
-	@egrep '.{81}' $(Sources)
+	@egrep -n '.{81}' $(Sources)
 
+check-for-tabs:
+	@egrep -n '	' $(Sources)
 #------------------------------------------------------------------------
 # Print out the directories used for building
 #------------------------------------------------------------------------
diff --git a/include/llvm/ADT/BitVector.h b/include/llvm/ADT/BitVector.h
index 56e5066dba..22599c56c1 100644
--- a/include/llvm/ADT/BitVector.h
+++ b/include/llvm/ADT/BitVector.h
@@ -128,12 +128,12 @@ public:
   int find_first() const {
     for (unsigned i = 0; i < NumBitWords(size()); ++i)
       if (Bits[i] != 0) {
-	if (sizeof(BitWord) == 4)
-	  return i * BITS_PER_WORD + CountTrailingZeros_32(Bits[i]);
-	else if (sizeof(BitWord) == 8)
-	  return i * BITS_PER_WORD + CountTrailingZeros_64(Bits[i]);
-	else
-	  assert(0 && "Unsupported!");
+        if (sizeof(BitWord) == 4)
+          return i * BITS_PER_WORD + CountTrailingZeros_32(Bits[i]);
+        else if (sizeof(BitWord) == 8)
+          return i * BITS_PER_WORD + CountTrailingZeros_64(Bits[i]);
+        else
+          assert(0 && "Unsupported!");
       }
     return -1;
   }
@@ -153,22 +153,22 @@ public:
 
     if (Copy != 0) {
       if (sizeof(BitWord) == 4)
-	return WordPos * BITS_PER_WORD + CountTrailingZeros_32(Copy);
+        return WordPos * BITS_PER_WORD + CountTrailingZeros_32(Copy);
       else if (sizeof(BitWord) == 8)
-	return WordPos * BITS_PER_WORD + CountTrailingZeros_64(Copy);
+        return WordPos * BITS_PER_WORD + CountTrailingZeros_64(Copy);
       else
-	assert(0 && "Unsupported!");
+        assert(0 && "Unsupported!");
     }
 
     // Check subsequent words.
     for (unsigned i = WordPos+1; i < NumBitWords(size()); ++i)
       if (Bits[i] != 0) {
-	if (sizeof(BitWord) == 4)
-	  return i * BITS_PER_WORD + CountTrailingZeros_32(Bits[i]);
-	else if (sizeof(BitWord) == 8)
-	  return i * BITS_PER_WORD + CountTrailingZeros_64(Bits[i]);
-	else
-	  assert(0 && "Unsupported!");
+        if (sizeof(BitWord) == 4)
+          return i * BITS_PER_WORD + CountTrailingZeros_32(Bits[i]);
+        else if (sizeof(BitWord) == 8)
+          return i * BITS_PER_WORD + CountTrailingZeros_64(Bits[i]);
+        else
+          assert(0 && "Unsupported!");
       }
     return -1;
   }
diff --git a/include/llvm/ADT/hash_set.in b/include/llvm/ADT/hash_set.in
index 1d4dff8b54..aa27e5f020 100644
--- a/include/llvm/ADT/hash_set.in
+++ b/include/llvm/ADT/hash_set.in
@@ -84,7 +84,7 @@ namespace HASH_NAMESPACE {
 /*
 template <class DataType> struct hash {
     unsigned int operator()(const unsigned int& x) const {
-	return x;
+      return x;
     }
 };
 */
diff --git a/include/llvm/Analysis/LoopPass.h b/include/llvm/Analysis/LoopPass.h
index 07b9c572ce..dd9480f0aa 100644
--- a/include/llvm/Analysis/LoopPass.h
+++ b/include/llvm/Analysis/LoopPass.h
@@ -55,7 +55,7 @@ class LoopPass : public Pass {
 
   /// Assign pass manager to manager this pass
   virtual void assignPassManager(PMStack &PMS,
-				 PassManagerType PMT = PMT_LoopPassManager);
+                                 PassManagerType PMT = PMT_LoopPassManager);
 
 };
 
diff --git a/include/llvm/CallGraphSCCPass.h b/include/llvm/CallGraphSCCPass.h
index 96c770232d..f68e44774b 100644
--- a/include/llvm/CallGraphSCCPass.h
+++ b/include/llvm/CallGraphSCCPass.h
@@ -52,7 +52,7 @@ struct CallGraphSCCPass : public Pass {
 
   /// Assign pass manager to manager this pass
   virtual void assignPassManager(PMStack &PMS,
-				 PassManagerType PMT = PMT_CallGraphPassManager);
+                                 PassManagerType PMT = PMT_CallGraphPassManager);
 
   /// getAnalysisUsage - For this class, we declare that we require and preserve
   /// the call graph.  If the derived class implements this method, it should
diff --git a/include/llvm/Pass.h b/include/llvm/Pass.h
index d517c41f17..30ddede85f 100644
--- a/include/llvm/Pass.h
+++ b/include/llvm/Pass.h
@@ -123,7 +123,7 @@ public:
   /// Each pass is responsible for assigning a pass manager to itself.
   /// PMS is the stack of available pass manager. 
   virtual void assignPassManager(PMStack &PMS, 
-				 PassManagerType T = PMT_Unknown) {}
+                                 PassManagerType T = PMT_Unknown) {}
   /// Check if available pass managers are suitable for this pass or not.
   virtual void preparePassManager(PMStack &PMS) {}
 
@@ -215,7 +215,7 @@ public:
   virtual bool runPass(BasicBlock&) { return false; }
 
   virtual void assignPassManager(PMStack &PMS, 
-				 PassManagerType T = PMT_ModulePassManager);
+                                 PassManagerType T = PMT_ModulePassManager);
   // Force out-of-line virtual method.
   virtual ~ModulePass();
 };
@@ -282,7 +282,7 @@ public:
   bool run(Function &F);
 
   virtual void assignPassManager(PMStack &PMS, 
-				 PassManagerType T = PMT_FunctionPassManager);
+                                 PassManagerType T = PMT_FunctionPassManager);
 };
 
 
@@ -337,7 +337,7 @@ public:
   virtual bool runPass(BasicBlock &BB);
 
   virtual void assignPassManager(PMStack &PMS, 
-				 PassManagerType T = PMT_BasicBlockPassManager);
+                                 PassManagerType T = PMT_BasicBlockPassManager);
 };
 
 /// PMStack
diff --git a/include/llvm/PassSupport.h b/include/llvm/PassSupport.h
index c4d75d52ee..7c3c4a9d66 100644
--- a/include/llvm/PassSupport.h
+++ b/include/llvm/PassSupport.h
@@ -137,8 +137,10 @@ struct RegisterPassBase {
   ///
   const PassInfo *getPassInfo() const { return &PIObj; }
 
+  typedef Pass* (*NormalCtor_t)();
+  
   RegisterPassBase(const char *Name, const char *Arg, const std::type_info &TI,
-                   Pass *(*NormalCtor)() = 0, bool CFGOnly = false)
+                   NormalCtor_t NormalCtor = 0, bool CFGOnly = false)
     : PIObj(Name, Arg, TI, NormalCtor, CFGOnly) {
     registerPass();
   }
@@ -164,7 +166,7 @@ struct RegisterPass : public RegisterPassBase {
   // Register Pass using default constructor...
   RegisterPass(const char *PassArg, const char *Name, bool CFGOnly = false)
   : RegisterPassBase(Name, PassArg, typeid(PassName),
-                     callDefaultCtor<PassName>, CFGOnly) {
+                     (RegisterPassBase::NormalCtor_t)callDefaultCtor<PassName>, CFGOnly) {
   }
 };
 
diff --git a/include/llvm/Support/Dwarf.h b/include/llvm/Support/Dwarf.h
index 47d0d16286..21f49f66b6 100644
--- a/include/llvm/Support/Dwarf.h
+++ b/include/llvm/Support/Dwarf.h
@@ -44,7 +44,7 @@ enum llvm_dwarf_constants {
   DW_TAG_user_base = 0x1000,            // Recommended base for user tags.
   
   DW_CIE_VERSION = 1,                   // Common frame information version.
-  DW_CIE_ID	 = 0xffffffff               // Common frame information mark.
+  DW_CIE_ID       = 0xffffffff          // Common frame information mark.
 };
 
 enum dwarf_constants {
diff --git a/include/llvm/Support/MathExtras.h b/include/llvm/Support/MathExtras.h
index 7f3c2432d0..f3c3b676d6 100644
--- a/include/llvm/Support/MathExtras.h
+++ b/include/llvm/Support/MathExtras.h
@@ -109,7 +109,7 @@ inline uint16_t ByteSwap_16(uint16_t Value) {
 /// 32-bit argument, Value.
 inline uint32_t ByteSwap_32(uint32_t Value) {
 #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)
-	return __builtin_bswap32(Value);
+  return __builtin_bswap32(Value);
 #elif defined(_MSC_VER) && !defined(_DEBUG)
   return _byteswap_ulong(Value);
 #else
@@ -125,7 +125,7 @@ inline uint32_t ByteSwap_32(uint32_t Value) {
 /// 64-bit argument, Value.
 inline uint64_t ByteSwap_64(uint64_t Value) {
 #if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)
-	return __builtin_bswap64(Value);
+  return __builtin_bswap64(Value);
 #elif defined(_MSC_VER) && !defined(_DEBUG)
   return _byteswap_uint64(Value);
 #else
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 0669425a48..c862371c93 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -884,9 +884,9 @@ public:
   // Div utility functions
   //
   SDOperand BuildSDIV(SDNode *N, SelectionDAG &DAG, 
-		      std::vector<SDNode*>* Created) const;
+                      std::vector<SDNode*>* Created) const;
   SDOperand BuildUDIV(SDNode *N, SelectionDAG &DAG, 
-		      std::vector<SDNode*>* Created) const;
+                      std::vector<SDNode*>* Created) const;
 
 
   //===--------------------------------------------------------------------===//
diff --git a/lib/Analysis/IPA/CallGraphSCCPass.cpp b/lib/Analysis/IPA/CallGraphSCCPass.cpp
index fcf4202826..0640b63e6b 100644
--- a/lib/Analysis/IPA/CallGraphSCCPass.cpp
+++ b/lib/Analysis/IPA/CallGraphSCCPass.cpp
@@ -82,8 +82,7 @@ bool CGPassManager::runOnModule(Module &M) {
        I != E; ++I) {
 
     // Run all passes on current SCC
-    for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) {  
-
+    for (unsigned Index = 0; Index < getNumContainedPasses(); ++Index) {
       Pass *P = getContainedPass(Index);
       AnalysisUsage AnUsage;
       P->getAnalysisUsage(AnUsage);
@@ -95,20 +94,20 @@ bool CGPassManager::runOnModule(Module &M) {
 
       StartPassTimer(P);
       if (CallGraphSCCPass *CGSP = dynamic_cast<CallGraphSCCPass *>(P))
-	Changed |= CGSP->runOnSCC(*I);   // TODO : What if CG is changed ?
+        Changed |= CGSP->runOnSCC(*I);   // TODO : What if CG is changed ?
       else {
-	FPPassManager *FPP = dynamic_cast<FPPassManager *>(P);
-	assert (FPP && "Invalid CGPassManager member");
-
-	// Run pass P on all functions current SCC
-	std::vector<CallGraphNode*> &SCC = *I;
-	for (unsigned i = 0, e = SCC.size(); i != e; ++i) {
-	  Function *F = SCC[i]->getFunction();
-	  if (F) {
+        FPPassManager *FPP = dynamic_cast<FPPassManager *>(P);
+        assert (FPP && "Invalid CGPassManager member");
+
+        // Run pass P on all functions current SCC
+        std::vector<CallGraphNode*> &SCC = *I;
+        for (unsigned i = 0, e = SCC.size(); i != e; ++i) {
+          Function *F = SCC[i]->getFunction();
+          if (F) {
             dumpPassInfo(P, EXECUTION_MSG, ON_FUNCTION_MSG, F->getName());
             Changed |= FPP->runOnFunction(*F);
           }
-	}
+        }
       }
       StopPassTimer(P);
 
@@ -149,7 +148,7 @@ bool CGPassManager::doFinalization(CallGraph &CG) {
 
 /// Assign pass manager to manage this pass.
 void CallGraphSCCPass::assignPassManager(PMStack &PMS,
-					 PassManagerType PreferredType) {
+                                         PassManagerType PreferredType) {
   // Find CGPassManager 
   while (!PMS.empty()) {
     if (PMS.top()->getPassManagerType() > PMT_CallGraphPassManager)
diff --git a/lib/CodeGen/MachOWriter.h b/lib/CodeGen/MachOWriter.h
index 061213a8c8..0792ac8a7d 100644
--- a/lib/CodeGen/MachOWriter.h
+++ b/lib/CodeGen/MachOWriter.h
@@ -254,19 +254,19 @@ namespace llvm {
       // The following constants are getting pulled in by one of the
       // system headers, which creates a neat clash with the enum.
 #if !defined(VM_PROT_NONE)
-#define VM_PROT_NONE		0x00
+#define VM_PROT_NONE    0x00
 #endif
 #if !defined(VM_PROT_READ)
-#define VM_PROT_READ		0x01
+#define VM_PROT_READ    0x01
 #endif
 #if !defined(VM_PROT_WRITE)
-#define VM_PROT_WRITE		0x02
+#define VM_PROT_WRITE   0x02
 #endif
 #if !defined(VM_PROT_EXECUTE)
-#define VM_PROT_EXECUTE		0x04
+#define VM_PROT_EXECUTE 0x04
 #endif
 #if !defined(VM_PROT_ALL)
-#define VM_PROT_ALL		0x07
+#define VM_PROT_ALL     0x07
 #endif
 
       // Constants for the vm protection fields
diff --git a/lib/CodeGen/README.txt b/lib/CodeGen/README.txt
index aa5a54c3ba..8e6b0a5e46 100644
--- a/lib/CodeGen/README.txt
+++ b/lib/CodeGen/README.txt
@@ -2,29 +2,29 @@
 
 Common register allocation / spilling problem:
 
-	mul lr, r4, lr
-	str lr, [sp, #+52]
-	ldr lr, [r1, #+32]
-	sxth r3, r3
-	ldr r4, [sp, #+52]
-	mla r4, r3, lr, r4
+        mul lr, r4, lr
+        str lr, [sp, #+52]
+        ldr lr, [r1, #+32]
+        sxth r3, r3
+        ldr r4, [sp, #+52]
+        mla r4, r3, lr, r4
 
 can be:
 
-	mul lr, r4, lr
+        mul lr, r4, lr
         mov r4, lr
-	str lr, [sp, #+52]
-	ldr lr, [r1, #+32]
-	sxth r3, r3
-	mla r4, r3, lr, r4
+        str lr, [sp, #+52]
+        ldr lr, [r1, #+32]
+        sxth r3, r3
+        mla r4, r3, lr, r4
 
 and then "merge" mul and mov:
 
-	mul r4, r4, lr
-	str lr, [sp, #+52]
-	ldr lr, [r1, #+32]
-	sxth r3, r3
-	mla r4, r3, lr, r4
+        mul r4, r4, lr
+        str lr, [sp, #+52]
+        ldr lr, [r1, #+32]
+        sxth r3, r3
+        mla r4, r3, lr, r4
 
 It also increase the likelyhood the store may become dead.
 
@@ -70,13 +70,13 @@ Some potential added complexities:
 
 bb27 ...
         ...
-	%reg1037 = ADDri %reg1039, 1
-	%reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
+        %reg1037 = ADDri %reg1039, 1
+        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
     Successors according to CFG: 0x8b03bf0 (#5)
 
 bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
     Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
-	%reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>
+        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>
 
 Note ADDri is not a two-address instruction. However, its result %reg1037 is an
 operand of the PHI node in bb76 and its operand %reg1039 is the result of the
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
index e4133cec6e..c6187f1109 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
@@ -288,9 +288,9 @@ private:
                                         // Tally iterator 
   
   /// SlotsAvailable - Returns true if all units are available.
-	///
+  ///
   bool SlotsAvailable(Iter Begin, unsigned N, unsigned ResourceSet,
-                                              unsigned &Resource) {
+                      unsigned &Resource) {
     assert(N && "Must check availability with N != 0");
     // Determine end of interval
     Iter End = Begin + N;
@@ -318,23 +318,23 @@ private:
     Resource = 0;
     return false;
   }
-	
-	/// RetrySlot - Finds a good candidate slot to retry search.
+  
+  /// RetrySlot - Finds a good candidate slot to retry search.
   Iter RetrySlot(Iter Begin, unsigned N, unsigned ResourceSet) {
     assert(N && "Must check availability with N != 0");
     // Determine end of interval
     Iter End = Begin + N;
     assert(End <= Tally.end() && "Tally is not large enough for schedule");
-		
-		while (Begin != End--) {
-			// Clear units in use
-			ResourceSet &= ~*End;
-			// If no units left then we should go no further 
-			if (!ResourceSet) return End + 1;
-		}
-		// Made it all the way through
-		return Begin;
-	}
+    
+    while (Begin != End--) {
+      // Clear units in use
+      ResourceSet &= ~*End;
+      // If no units left then we should go no further 
+      if (!ResourceSet) return End + 1;
+    }
+    // Made it all the way through
+    return Begin;
+  }
   
   /// FindAndReserveStages - Return true if the stages can be completed. If
   /// so mark as busy.
@@ -391,13 +391,13 @@ public:
   // FindAndReserve - Locate an ideal slot for the specified stages and mark
   // as busy.
   unsigned FindAndReserve(unsigned Slot, InstrStage *StageBegin,
-                                         InstrStage *StageEnd) {
-		// Where to begin 
-		Iter Begin = Tally.begin() + Slot;
-		// Find a free slot
-		Iter Where = FindSlots(Begin, StageBegin, StageEnd);
-		// Distance is slot number
-		unsigned Final = Where - Tally.begin();
+                          InstrStage *StageEnd) {
+    // Where to begin 
+    Iter Begin = Tally.begin() + Slot;
+    // Find a free slot
+    Iter Where = FindSlots(Begin, StageBegin, StageEnd);
+    // Distance is slot number
+    unsigned Final = Where - Tally.begin();
     return Final;
   }
 
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index d72c6eb01d..7d30062995 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -2150,7 +2150,7 @@ static mu magicu64(uint64_t d)
 /// multiplying by a magic number.  See:
 /// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
 SDOperand TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG, 
-				    std::vector<SDNode*>* Created) const {
+                                    std::vector<SDNode*>* Created) const {
   MVT::ValueType VT = N->getValueType(0);
   
   // Check to see if we can do this.
@@ -2198,7 +2198,7 @@ SDOperand TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
 /// multiplying by a magic number.  See:
 /// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
 SDOperand TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
-				    std::vector<SDNode*>* Created) const {
+                                    std::vector<SDNode*>* Created) const {
   MVT::ValueType VT = N->getValueType(0);
   
   // Check to see if we can do this.
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index 6058be114e..2b0450b971 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -53,8 +53,8 @@ bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI,
   case ARM::MOVr:
   case ARM::tMOVr:
     assert(MI.getNumOperands() == 2 && MI.getOperand(0).isRegister() &&
-	   MI.getOperand(1).isRegister() &&
-	   "Invalid ARM MOV instruction");
+           MI.getOperand(1).isRegister() &&
+           "Invalid ARM MOV instruction");
     SrcReg = MI.getOperand(1).getReg();
     DstReg = MI.getOperand(0).getReg();
     return true;
diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index bf6adbd95f..09420071bf 100644
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -1372,7 +1372,7 @@ static bool isCSRestore(MachineInstr *MI, const unsigned *CSRegs) {
 }
 
 void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,
-				   MachineBasicBlock &MBB) const {
+                                   MachineBasicBlock &MBB) const {
   MachineBasicBlock::iterator MBBI = prior(MBB.end());
   assert((MBBI->getOpcode() == ARM::BX_RET ||
           MBBI->getOpcode() == ARM::tBX_RET ||
diff --git a/lib/Target/Alpha/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AlphaAsmPrinter.cpp
index 18ff6babf5..0494777aab 100644
--- a/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -53,9 +53,9 @@ namespace {
     bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
                          unsigned AsmVariant, const char *ExtraCode);
     bool PrintAsmMemoryOperand(const MachineInstr *MI, 
-			       unsigned OpNo,
-			       unsigned AsmVariant, 
-			       const char *ExtraCode);
+                               unsigned OpNo,
+                               unsigned AsmVariant, 
+                               const char *ExtraCode);
   };
 } // end of anonymous namespace
 
@@ -278,16 +278,16 @@ bool AlphaAsmPrinter::doFinalization(Module &M) {
 /// PrintAsmOperand - Print out an operand for an inline asm expression.
 ///
 bool AlphaAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
-                                    unsigned AsmVariant, 
-                                    const char *ExtraCode) {
+                                      unsigned AsmVariant, 
+                                      const char *ExtraCode) {
   printOperand(MI, OpNo);
   return false;
 }
 
 bool AlphaAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, 
-					    unsigned OpNo,
-					    unsigned AsmVariant, 
-					    const char *ExtraCode) {
+                                            unsigned OpNo,
+                                            unsigned AsmVariant, 
+                                            const char *ExtraCode) {
   if (ExtraCode && ExtraCode[0])
     return true; // Unknown modifier.
   O << "0(";
diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 14da957333..2f1eb48068 100644
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -50,7 +50,7 @@ namespace {
     static int64_t get_ldah16(int64_t x) {
       int64_t y = x / IMM_MULT;
       if (x % IMM_MULT > IMM_HIGH)
-	++y;
+        ++y;
       return y;
     }
 
@@ -145,7 +145,7 @@ namespace {
   public:
     AlphaDAGToDAGISel(TargetMachine &TM)
       : SelectionDAGISel(AlphaLowering), 
-	AlphaLowering(*(AlphaTargetLowering*)(TM.getTargetLowering())) 
+        AlphaLowering(*(AlphaTargetLowering*)(TM.getTargetLowering())) 
     {}
 
     /// getI64Imm - Return a target constant with the specified value, of type
@@ -177,7 +177,7 @@ namespace {
       default: return true;
       case 'm':   // memory
         Op0 = Op;
-	AddToISelQueue(Op0);
+        AddToISelQueue(Op0);
         break;
       }
       
@@ -203,7 +203,7 @@ SDOperand AlphaDAGToDAGISel::getGlobalBaseReg() {
   MachineFunction* MF = BB->getParent();
   unsigned GP = 0;
   for(MachineFunction::livein_iterator ii = MF->livein_begin(), 
-	ee = MF->livein_end(); ii != ee; ++ii)
+        ee = MF->livein_end(); ii != ee; ++ii)
     if (ii->first == Alpha::R29) {
       GP = ii->second;
       break;
@@ -219,7 +219,7 @@ SDOperand AlphaDAGToDAGISel::getGlobalRetAddr() {
   MachineFunction* MF = BB->getParent();
   unsigned RA = 0;
   for(MachineFunction::livein_iterator ii = MF->livein_begin(), 
-	ee = MF->livein_end(); ii != ee; ++ii)
+        ee = MF->livein_end(); ii != ee; ++ii)
     if (ii->first == Alpha::R26) {
       RA = ii->second;
       break;
@@ -283,16 +283,16 @@ SDNode *AlphaDAGToDAGISel::Select(SDOperand Op) {
     AddToISelQueue(N1);
     AddToISelQueue(N2);
     Chain = CurDAG->getCopyToReg(Chain, Alpha::R24, N1, 
-				 SDOperand(0,0));
+                                 SDOperand(0,0));
     Chain = CurDAG->getCopyToReg(Chain, Alpha::R25, N2, 
-				 Chain.getValue(1));
+                                 Chain.getValue(1));
     Chain = CurDAG->getCopyToReg(Chain, Alpha::R27, N0, 
-				 Chain.getValue(1));
+                                 Chain.getValue(1));
     SDNode *CNode =
       CurDAG->getTargetNode(Alpha::JSRs, MVT::Other, MVT::Flag, 
                             Chain, Chain.getValue(1));
     Chain = CurDAG->getCopyFromReg(Chain, Alpha::R27, MVT::i64, 
-				  SDOperand(CNode, 1));
+                                   SDOperand(CNode, 1));
     return CurDAG->SelectNodeTo(N, Alpha::BISr, MVT::i64, Chain, Chain);
   }
 
@@ -316,11 +316,11 @@ SDNode *AlphaDAGToDAGISel::Select(SDOperand Op) {
     int64_t val = (int64_t)uval;
     int32_t val32 = (int32_t)val;
     if (val <= IMM_HIGH + IMM_HIGH * IMM_MULT &&
-	val >= IMM_LOW  + IMM_LOW  * IMM_MULT)
+        val >= IMM_LOW  + IMM_LOW  * IMM_MULT)
       break; //(LDAH (LDA))
     if ((uval >> 32) == 0 && //empty upper bits
-	val32 <= IMM_HIGH + IMM_HIGH * IMM_MULT)
-      //	val32 >= IMM_LOW  + IMM_LOW  * IMM_MULT) //always true
+        val32 <= IMM_HIGH + IMM_HIGH * IMM_MULT)
+      // val32 >= IMM_LOW  + IMM_LOW  * IMM_MULT) //always true
       break; //(zext (LDAH (LDA)))
     //Else use the constant pool
     ConstantInt *C = ConstantInt::get(Type::Int64Ty, uval);
@@ -328,7 +328,7 @@ SDNode *AlphaDAGToDAGISel::Select(SDOperand Op) {
     SDNode *Tmp = CurDAG->getTargetNode(Alpha::LDAHr, MVT::i64, CPI,
                                         getGlobalBaseReg());
     return CurDAG->SelectNodeTo(N, Alpha::LDQr, MVT::i64, MVT::Other, 
-                            CPI, SDOperand(Tmp, 0), CurDAG->getEntryNode());
+                                CPI, SDOperand(Tmp, 0), CurDAG->getEntryNode());
   }
   case ISD::TargetConstantFP: {
     ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);